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Searching: computer memory





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Patent # Description
US-9,824,010 Multiple data channel memory module architecture
According to one example of the present disclosure, a system includes a computing element configured to provide requests for memory access operations and a...
US-9,824,008 Cache memory sharing in a multi-core processor (MCP)
This invention describes an apparatus, computer architecture, memory structure, memory control, and cache memory operation method for multi-core processor. A...
US-9,823,991 Concurrent workload simulation for application performance testing
Embodiments of the present invention provide a method, system and computer program product for concurrent workload simulation for application performance...
US-9,823,972 Mobile flash storage boot partition and/or logical unit shadowing
Embodiments of the inventive concept include computer-implemented method for shadowing one or more boot images of a mobile device. The technique can include...
US-9,823,871 Performance of coprocessor assisted memset() through heterogeneous computing
Techniques herein perform coprocessor assisted memory filling in a pipeline. A computer receives a request to fill multiple ranges of memory addresses with a...
US-9,823,866 Scalable data storage architecture and methods of eliminating I/O traffic bottlenecks
A Storage Area Network (SAN) system has host computers, front-end SAN controllers (FE_SAN) connected via a bus or network interconnect to back-end SAN...
US-9,823,856 Intelligent flash architecture
A disclosed system and method executable on a computer for managing a memory storage system includes prioritizing log data over cache data and over metadata in...
US-9,823,851 Secure migratable architecture having security features
Methods and systems for implementing a secure migratable architecture are disclosed. One method includes, upon initiating execution of a process, allocating a...
US-9,823,845 Adaptive dispersed storage network (DSN) and system
A computing device includes an interface configured to interface and communicate with a dispersed storage network (DSN), a memory that stores operational...
US-9,823,843 Memory hierarchy monitoring systems and methods
Systems, methods, and devices of the various aspects enable identification of anomalous application behavior by monitoring memory accesses by an application...
US-9,823,758 Automatic performance of touch screen related functionality in response to detected stylus position
A computer system has a touch sensitive display screen within a housing and a touch sensor, which is coupled to a bus. A processor and a memory are coupled to...
US-9,823,731 Adaptive power control of address map memory devices
An apparatus includes a storage resource to store data. The data can be accessible by a host computer system. The apparatus includes a set of dynamically...
US-9,823,086 Fuel consumption predictions using associative memories
A method, system, and computer program product for predicting fuel consumption for a vehicle operation is provided. Data for historical vehicle operations is...
US-9,821,344 Systems and methods for scanning information from storage area contents
The present invention is related to methods and systems for collected item information for stored items. In one embodiment, a networked food storage system...
US-9,819,970 Reducing memory consumption during video decoding
Video decoding innovations for multithreading implementations and graphics processor unit ("GPU") implementations are described. For example, for multithreaded...
US-9,819,823 Information processing apparatus, information processing method, and non-transitory computer readable medium...
An information processing apparatus includes a drawing resource acquisition unit that segments a common drawing resource in a first memory into drawing resource...
US-9,819,757 Using proxy devices as dynamic data relays
A local server is configured to communicate with a plurality of computing devices within a local network. The local server comprises memory for storing...
US-9,818,488 Read threshold voltage adaptation using bit error rates based on decoded data
A read threshold voltage for a memory is adjusted based on a bit error rate based on decoded data for a plurality of read threshold voltages. The read threshold...
US-9,818,424 Method and apparatus for suppression of unwanted audio signals
A method, and one or more non-transitory computer-readable media storing instructions, and a device for removal of unwanted components in an audio signal, the...
US-9,818,147 3D printing: marketplace with federated access to printers
Systems, methods, and media for optimizing and facilitating 3D printing services in a marketplace environment are provided. In one example, a system comprises a...
US-9,818,117 Systems and methods for using social network data to determine payment fraud
A computer-implemented method for analyzing potentially fraudulent e-commerce payment transactions utilizing social media data is provided. The method uses a...
US-9,818,114 Systems and methods for performing payment card transactions using a wearable computing device
A computer-based method for authenticating a suspect consumer as an authorized cardholder during a payment card transaction is provided. The method includes...
US-9,818,059 Exploiting input data sparsity in neural network compute units
A computer-implemented method includes receiving, by a computing device, input activations and determining, by a controller of the computing device, whether...
US-9,818,043 Real-time, model-based object detection and pose estimation
A system includes a memory and a processor configured to select a set of scene point pairs, to determine a respective feature vector for each scene point pair,...
US-9,818,013 Mobile computer configured to read multiple decodable indicia
A device can comprise a processor, a memory, an imaging subsystem configured to acquire an image of decodable indicia, a display, and a communication interface....
US-9,817,914 Extensible markup language (XML) performance optimization on a multi-core central processing unit (CPU) through...
Embodiments of the present invention address deficiencies of the art in respect to XML schema validation and provide a method, system and computer program...
US-9,817,874 Parallel spatio temporal indexing for high-update workloads and query processing
Disclosed herein are system, method, and computer program product embodiments for providing a spatio-temporal index for high-update workloads and query...
US-9,817,813 Generalized phrases in automatic speech recognition systems
A method for generating a suggested phrase having a similar meaning to a supplied phrase in an analytics system includes: receiving, on a computer system...
US-9,817,786 Ingress data placement
Server computers often include one or more input/output (I/O) adapter devices for communicating with a network or directly attached storage device. The data...
US-9,817,784 Multi-port transmitter device for transmitting at least partly redundant data, an associated control system, an...
A multi-port transmitter device for transmitting at least partly redundant data is described. The multi-port transmitter device comprises at least two...
US-9,817,776 Memory descriptor list caching and pipeline processing
Memory descriptor list caching and pipeline processing techniques are described. In one or more examples, a method is configured to increase efficiency of...
US-9,817,770 Memory address re-mapping of graphics data
A method and apparatus for creating, updating, and using guest physical address (GPA) to host physical address (HPA) shadow translation tables for translating...
US-9,817,765 Dynamic hierarchical memory cache awareness within a storage system
A computing device-implemented method for implementing dynamic hierarchical memory cache (HMC) awareness within a storage system is described. Specifically,...
US-9,817,763 Method of establishing pre-fetch control information from an executable code and an associated NVM controller,...
A method of establishing pre-fetch control information from an executable code is described. The method comprises inspecting the executable code to find one or...
US-9,817,761 Methods, systems, and computer readable media for optimization of host sequential reads or writes based on...
A method for optimization of host sequential reads based on volume of data includes, at a mass data storage device, pre-fetching a first volume of predicted...
US-9,817,756 Managing memory in virtualized environments
Techniques are described for enabling a virtual machine to be presented with an amount of available guest memory, where a hypervisor or other privileged...
US-9,817,754 Flash memory management
Disclosed aspects include managing the access of flash memory by a computer system. A physical memory address space which includes a flash memory portion is...
US-9,817,753 Flash memory management
Disclosed aspects include managing the access of flash memory by a computer system. A physical memory address space which includes a flash memory portion is...
US-9,817,749 Apparatus and method of offloading processing from a data storage device to a host device
A storage device includes non-volatile memory and a controller. A method performed in the data storage device includes sending an instruction to a host device...
US-9,817,744 Method and apparatus for tracing memory accesses
Apparatus, computer-readable storage medium and a method executed by a computer for tracing the memory accesses of an object-oriented program comprises...
US-9,817,728 Fast system state cloning
A system and method to create a clone of a source computing system, the system including the steps of selecting a memory space coupled to the source computing...
US-9,817,720 Methods, apparatuses and computer program products enabling to improve handover security in mobile...
An apparatus comprises a memory unit, and a control unit connected to the memory unit. The apparatus can be configured to interface at least one access node;...
US-9,817,714 Memory device on-die error checking and correcting code
In a system where a memory device performs on-die ECC, the ECC operates on N-bit data words as two (N/2)-bit segments, with a code matrix having a corresponding...
US-9,817,701 Threshold computing in a distributed computing system
A computing device includes an interface configured to interface and communicate with a dispersed storage network (DSN), a memory that stores operational...
US-9,817,682 System architecture for machine vision on moving platforms
A computer system for processing machine vision data and performing active control of a mobile platform includes a plurality of sensors configured to acquire...
US-9,817,654 System and method for communication of software
A vehicle includes at least one programmable computing device including a memory configured to store instructions that are executable by a processor. The...
US-9,817,631 Control of vehicle interior sound levels based on vehicle location
A computing device for a vehicle interior sound control system is described. The device includes one or more processors for controlling operation of the...
US-9,817,615 Network based font management for imaging devices
A system includes a computing device that includes a memory configured to store instructions. The computing device also includes a processor to execute the...
US-9,817,612 High-performance hash joins using memory with extensive internal parallelism
In one embodiment, a computer-implemented method includes issuing, to a DRAM with EIP, a first group of two or more load requests to load data from a hash table...
US-9,817,586 Method of application aware IO completion mode changer for key value device
A system and method for enabling an application (125, 305, 310, 315) and a storage device (120) to be more aware of each other may include a computer (105), a...
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