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Searching: computer memory





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Patent # Description
US-8,442,962 Distributed transaction management using two-phase commit optimization
A computer-implemented method, a computer-readable medium and a system are provided. A transaction master for each of a plurality of transactions of a database...
US-8,442,954 Creating and managing links to deduplication information
In a method of linking to information in a deduplication data sequence, a branching point is identified. The branching point is a place where a branch data...
US-8,442,886 Systems and methods for identifying financial relationships
Improved systems and methods are provided for identifying financial relationships. In particular, financial relationships may be identified by associating...
US-8,442,829 Automatic computation streaming partition for voice recognition on multiple processors with limited memory
Speech processing is disclosed for an apparatus having a main processing unit, a memory unit, and one or more co-processors. Memory maintenance and voice...
US-8,442,766 Marking apparatus having enhanced features for underground facility marking operations, and associated methods...
Marking information relating to use of a marking device to perform a marking operation may be acquired from one or more input devices, logged/stored in local...
US-8,442,611 Medical device with reservoir-based sensors
A medical device is provided which may include a reservoir which has an opening and contains a sensor; a reservoir cap closing off the opening to isolate the...
US-8,442,399 Port wavelength restriction encoding in wavelength switched optical network
An apparatus comprising a path computation element (PCE) coupled to a path computation client (PCC) and configured to perform a path computation using port...
US-8,442,250 Hearing aid and method for controlling signal processing in a hearing aid
A hearing aid includes a signal path for receiving at least one audio input signal and an autocorrelation index (ACI) estimator (4). The ACI includes a...
US-8,441,940 Parallel packet processor with session active checker
Apparatus, processes, and computer readable storage media for processing received packets. A session memory, coupled to and shared by a plurality of packet...
US-8,441,927 System and method for implementing periodic early discard in on-chip buffer memories of network elements
An advance is made over the prior art in accordance with the principles of the present invention that is directed to a new approach for a system and method for...
US-8,441,492 Methods and apparatus for image processing at pixel rate
Embodiments of the present invention provide for improved timing control in 2-D image processing to maintain a constant rate of memory fetches and pixel outputs...
US-8,441,489 System and method for SIFT implementation and optimization
A method is to implement a Scale Invariant Feature Transform algorithm in a shared memory multiprocessing system. The method comprises building differences of...
US-8,440,990 Nonvolatile memory device having an electrode interface coupling region
Embodiments of the invention generally relate to a resistive switching nonvolatile memory device having an interface layer structure disposed between at least...
US-8,440,020 Apparatus and method for the production of flexible semiconductor devices
Apparatus for continuously producing flexible semiconductor devices through deposition of a plurality of semiconductor layers onto a moving flexible substrate...
US-8,439,749 Gaming system having tools for pairing wagering games with available progressive games
Gaming devices, gaming systems, methods of conducting wagering games, and computer programs for conducting wagering games are disclosed. A gaming system for...
US-RE44,220 Electronic identification system and method with source authenticity
An RF electronic identification system (10) is disclosed and claimed. The system includes at least one transponder encoder (14.1) for writing data into a memory...
US-8,438,644 Information system security based on threat vectors
A security system is provided. The system comprises a computer system, a memory accessible to the computer system, a data store, and an application. The data...
US-8,438,578 Network on chip with an I/O accelerator
Data processing on a network on chip (`NOC`) that includes IP blocks, routers, memory communications controllers, and network interface controllers; each IP...
US-8,438,534 Transformation of data between hierarchical data formats
A method of creating computer instructions for transforming inbound instances, being instances of an inbound data format, into outbound instances, being...
US-8,438,474 Speculative rendering during cache revalidation
A method may include storing, in a memory associated with a computer device, cached content associated with a document and receiving a request to access the...
US-8,438,431 Support element office mode array repair code verification
A support element for verifying an array repair code solution includes a memory subsystem element including product data read from multichip modules utilized in...
US-8,438,423 Invalid setup recovery
Technologies are described herein for allowing a computer system to recover from an invalid configuration, without requiring any modifications to the hardware...
US-8,438,377 Information processing apparatus, method and computer-readable storage medium that encrypts and decrypts data...
An information processing apparatus includes a main memory unit storing while on-power; an auxiliary storage unit functionable even off-power; a control unit...
US-8,438,376 Method and system for providing a modular server on USB flash storage
A method and system for providing a modular server-on-a-USB-flash-storage is disclosed. The server-on-a-USB-flash-storage is installed on a computing device....
US-8,438,363 Optimization of paging cache protection in virtual environment
A system, method and computer program product for virtualizing a processor include a virtualization system running on a computer system and controlling memory...
US-8,438,356 Flash memory controller
Methods, systems and computer program products for implementing a polling process among one or more flash memory devices are described. In some implementations,...
US-8,438,351 Binary level update of compressed read-only file systems
A method and computer-readable memory device that enable processing of a first memory image comprising a plurality of compressed sub-blocks and uncompressed...
US-8,438,338 Flexible use of extended cache using a partition cache footprint
An approach is provided to identifying cache extension sizes that correspond to different partitions that are running on a computer system. The approach extends...
US-8,438,289 Cross-domain communications with a shared worker application
Techniques are described herein that provide for inter-domain communications with one or more shared worker applications. A parent web application associated...
US-8,438,038 Weight loss or weight management system
A system for weight loss or weight management of a person may include a monitoring unit and remote computing system. The monitoring unit includes a transducer...
US-8,437,976 Gas density transducer with a microprocessor executing an algorithm solving Van Der Waal's equation
A gas density transducer including: a piezoresistive bridge sensor operative to provide an output indicative of an applied pressure, a computing processor...
US-8,437,571 Method and system for adaptive context-embedded prediction
One embodiment of the present invention is directed to an adaptive context-based predictor that predicts a value {circumflex over (x)} from a context, stored in...
US-8,437,545 System and method for digital image signal compression using intrinsic images
In a first exemplary embodiment of the present invention, an automated, computerized method is provided for processing an image. According to a feature of the...
US-8,437,477 Key information issuing device, wireless operation device, and program
A wireless apparatus including a button; a wireless communication interface; a processing unit to output encryption key information to another wireless...
US-8,437,183 Auxiliary parity bits for data written in multi-level cells
Methods of writing data to and reading data from memory devices and systems for writing and reading data are disclosed. In a particular embodiment, a method...
US-8,437,161 Information storage system for buildings, structures, or tombstones
A memory storage system for installing in a wall, building, structure, or tombstone. The system features a microprocessor and memory storage component for...
US-8,437,023 Image processing apparatus, method for image processing, and computer readable medium for executing various...
An image processing apparatus is provided and includes: a memory that stores discrimination information and a setting value group associated with the...
US-8,437,019 Image processing apparatus provided with an image memory used by a plurality of boards performing expanded data...
An image processing apparatus for eliminating the necessity of providing a first control board with a power supply unit beforehand for backing up data stored in...
US-8,437,017 Printing apparatus and computer program product for displaying bitmap of operation screen from rasterized PDL...
Print data for display in which an operation screen of a multifunction periphery is described in a page-description language is created and outputted to an...
US-8,436,868 Block linear memory ordering of texture data
A method of organizing memory for storage of texture data, in accordance with one embodiment of the invention, includes accessing a size of a mipmap level of a...
US-8,434,155 Pre-boot protected memory channel
Machine readable media, methods, and computing devices are disclosed which establish a protected memory channel between an operating system loader of a user...
US-8,434,099 Efficient linking and loading for late binding and platform retargeting
A method of producing an executable image from an object file without shared library support from the operating system, wherein the executable image requires a...
US-8,434,091 System and method for data synchronization for a computer architecture for broadband networks
A computer architecture and programming model for high speed processing over broadband networks are provided. The architecture employs a consistent modular...
US-8,433,947 Computer program, method, and apparatus for controlling data allocation
A computer executes a data allocation control program to control allocation of data in a plurality of disk nodes. A redundancy restoration module executes a...
US-8,433,927 Cryptographically-enabled privileged mode execution
A method, computer program product, and data processing system are disclosed for protecting sensitive program code (and also data) from unauthorized access in a...
US-8,433,909 One-to-many electronic signature process
Aspects of the invention include methods and systems for electronically signing a plurality of documents, such as an insurance application, a loan application,...
US-8,433,904 Portable smart card reader having secure wireless communications capability
A reader device includes a housing for receiving a smart card, a processor in electronic communication with an integrated circuit chip of the smart card when...
US-8,433,881 Programmable signal processing circuit and method of interleaving
A programmable signal processing circuit is used to (de-)interleave a data stream. Data from the signal stream is stored in a data memory (28) and read in a...
US-8,433,873 Disposition instructions for extended access commands
A computer system that generates a disposition instruction and an associated access command directed to a block of data at a logical address is described. The...
US-8,433,868 Concurrent copy of system configuration global metadata
Method, system, and computer program product embodiments for concurrent copy of system configuration global metadata in a data storage system are provided. In...
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