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Searching: computer memory





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Patent # Description
US-9,734,550 Methods and apparatus for efficiently determining run lengths and identifying patterns
Methods and apparatus for efficiently computing vertical run length values corresponding to an image and/or identifying image patterns, e.g., bar codes and QR...
US-9,734,501 Authentication and interaction tracking system and method
Aspects of the invention relate to a central authentication and interaction tracking system for authenticating an entity making a request related to a financial...
US-9,734,394 Systems and methods for temporally-based geospatial data conflation
A method for registering existing vector data associated with a first image of a location to a second image of the location is provided. Typically the images...
US-9,734,333 Information security techniques including detection, interdiction and/or mitigation of memory injection attacks
Methods of detecting malicious code injected into memory of a computer system are disclosed. The memory injection detection methods may include enumerating...
US-9,734,330 Inspection and recovery method and apparatus for handling virtual machine vulnerability
An inspection and recovery method and apparatus for handling virtual machine vulnerability, which inspect the security status of a virtual machine in a...
US-9,734,329 Mitigating ROP attacks
Mitigating return-oriented programming attacks. From program code and associated components needed by the program code for execution, machine language...
US-9,734,215 Data mining technique with experience-layered gene pool
Roughly described, a computer-implemented evolutionary data mining system includes a memory storing a candidate gene database in which each candidate individual...
US-9,734,170 Multilevel filters for cache-efficient access
According to one embodiment of the present invention, a system with a plurality of memories, generates a first filter associated with a first memory, and...
US-9,734,129 Low complexity partial parallel architectures for Fourier transform and inverse Fourier transform over...
Low complexity partial parallel architectures for performing a Fourier transform and an inverse Fourier transform over subfields of a finite field are...
US-9,734,124 Direct linked two way forms
A method for managing a two-way form over a direct link is provided. The method includes establishing a communicative link between two communications clients...
US-9,734,104 Data transfer control apparatus, data transfer control method, and computer product
A data transfer control apparatus includes a transferring unit that transfers data from a transfer source memory to a transfer destination memory, according to...
US-9,734,089 Memory management unit and method for accessing data
A method for accessing data blocks stored in a computer system. The method may include hardware components for controlling access to a memory unit of the...
US-9,734,088 Memory management unit and method for accessing data
A method for accessing data blocks stored in a computer system. The method may include hardware components for controlling access to a memory unit of the...
US-9,734,073 System and method for flash read cache with adaptive pre-fetch
Systems and methods for improved flash memory performance in a portable computing device are presented. In a method, a value N corresponding to an amount of...
US-9,734,063 Scale-out non-uniform memory access
A computing system that uses a Scale-Out NUMA ("soNUMA") architecture, programming model, and/or communication protocol provides for low-latency, distributed...
US-9,734,053 Garbage collection handler to update object pointers
Garbage collection processing is facilitated. Based on execution of a load instruction and determining that an object pointer to be loaded indicates a location...
US-9,734,013 System and method for providing operating system independent error control in a computing device
Systems and methods are disclosed for providing operating system independent error control in computing devices. One embodiment is a method comprising: defining...
US-9,733,988 Systems and methods to achieve load balancing among a plurality of compute elements accessing a shared memory pool
Various systems and methods to achieve load balancing among a plurality of compute elements accessing a shared memory pool. The shared memory pool is configured...
US-9,733,982 Information processing device and method for assigning task
A computer calculates memory access rates for respective tasks on basis of hardware monitor information obtained by monitoring operating states of hardware...
US-9,733,980 Virtual machine management using I/O device logging
Techniques are described for managing virtual machines using input/output (I/O) device logging. For example, a system bus or other interface to a device may be...
US-9,733,960 Communications network and a network terminal
A power line communication network, comprising: a plurality of network terminals and at least one power line, wherein each terminal is coupled to said at least...
US-9,733,901 Domain specific language design
A computing system includes a processor; and a memory communicatively coupled to the processor. The processor is configured to: receive from a user, a number of...
US-9,733,855 System and methods for adjusting memory command placement
Integrated circuits may include memory interface circuitry operable to communicate with memory. The memory interface circuitry may include a memory controller...
US-9,733,854 Dynamic adaptive compression in network storage device
Methods, systems, and computer programs are presented for dynamic adaptive compression in a storage device. One method includes operations for setting a...
US-9,733,840 Managing the write performance of an asymmetric memory system
Some implementations include a method of managing a hosted non-volatile random-access memory (NVRAM) based storage subsystem that includes NVRAM devices. The...
US-9,733,838 Device and method of interface between devices or input/output peripherals and electronic computers
An electronic device (100) of interface between input/output peripherals (200) or devices and an electronic computer (300), the device being configured for...
US-9,733,833 Selecting pages implementing leaf nodes and internal nodes of a data set index for reuse
Provided are a computer program product, system, and method for selecting pages implementing leaf nodes and internal nodes of a data set index for reuse in...
US-9,733,706 Apparatus and associated methods for touchscreen displays
An apparatus including at least one processor and at least one memory including computer program code, the at least one memory and the computer program code...
US-9,733,705 Apparatus, method, computer program and user interface
An apparatus, method, computer program and apparatus wherein the apparatus comprises: at least one processor: and at least one memory including computer program...
US-9,733,341 System and method for covariance fidelity assessment
A system for testing the covariance fidelity of an optimal reduced state estimator comprises data storage devices for storing testing data, computer processors...
US-9,727,735 Method and system for simulating the effects of an attack on a computer code
Methods and systems of simulating the effects of an attack seeking fraudulently to modify target code that is interpretable by a processor are disclosed....
US-9,727,523 Remote direct memory access (RDMA) optimized high availability for in-memory data storage
A method for RDMA optimized high availability for in-memory storing of data includes receiving RDMA key-value store write requests in a network adapter of a...
US-9,727,483 Tracking memory accesses when invalidating effective address to real address translations
According to embodiments of the present disclosure, a method for invalidating an address translation entry in an effective address to real address translation...
US-9,723,669 LED lighting system and controller, a method of controlling a plurality of LEDs, and a computer program therefor
An LED lighting system is disclosed comprising: a heatsink; a plurality of strings of LEDs each string comprising one or more LEDs each having a junction and...
US-9,723,015 Detecting malware-related activity on a computer
Detecting malware-related activity on a computer by detecting activity associated with the creation of a data object, where the activity is performed by a...
US-9,723,014 Detecting malware-related activity on a computer
Detecting malware-related activity on a computer by detecting activity associated with the creation of a data object, where the activity is performed by a...
US-9,722,946 Apparatus and method for a script execution control environment
A computing environment provisioning system includes a processing system and a memory for storing a locking service that is executed by the processing system to...
US-9,721,322 Selective utilization of graphics processing unit (GPU) based acceleration in database management
A method for the selective utilization of graphics processing unit (GPU) acceleration of database queries in database management is provided. The method...
US-9,721,026 Systems for topic exploration and related methods
Some embodiments include a system. The system can include an input device, an output device, one or more processors, and one or more non-transitory memory...
US-9,720,863 Migrating MMIO from a source I/O adapter of a source computing system to a destination I/O adapter of a...
Migrating memory MMIO from a source I/O adapter of a source computing system to a destination I/O adapter of a destination computing system, includes:...
US-9,720,728 Migrating a VM when the available migration duration times of a source and destination node are greater than...
Embodiments of the present invention disclose a virtual machine migration management method, where the method includes: calculating, according to migration...
US-9,720,723 Protected guests in a hypervisor controlled system
A computer-implemented method includes receiving a definition of a source guest memory area for utilization by a virtual machine on a source system, wherein the...
US-9,720,699 Efficient RAM usage in computing devices
Systems and methods are disclosed for managing program code in a computing device, such as an embedded system. In a computing device, a non-volatile flash...
US-9,720,686 Melding of mediation flow service component architecture (SCA) components
Embodiments of the present invention provide a method, system and computer program product for melding mediation and adaptation modules of a service component...
US-9,720,667 Automatic loop vectorization using hardware transactional memory
Technologies for automatic loop vectorization include a computing device with an optimizing compiler. During an optimization pass, the compiler identifies a...
US-9,720,602 Data transfers in columnar data systems
A computer-implemented method includes receiving a request to transmit column group data to a target node, the column group data comprising C columns within a...
US-9,720,474 Electronic control unit
An electronic control unit mounted in an object includes: a rewritable memory of control and reprogramming software; a not-always-on power supply system...
US-9,718,653 Multi function heave compensator
A heave compensator with adjustable dampening properties includes a length extension device having an inner space divided by a slide-able piston into a vacuum...
US-9,716,804 Image forming apparatus, image forming method, and non-transitory computer readable medium
An image forming apparatus includes an extracting unit, a verifying unit, and a memory. The extracting unit extracts a form from image formation data related to...
US-9,716,769 System, method and storage medium for managing items within file directory structure
A file-mapping method and system can better manage the number of items (i.e., files, subdirectories, or a combination of them) within any single directory...
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