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Searching: computer memory





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Patent # Description
US-1,010,2179 Multiple core computer processor with globally-accessible local memories
A multi-core computer processor including a plurality of processor cores interconnected in a Network-on-Chip (NoC) architecture, a plurality of caches, each of...
US-1,010,2154 Protected memory area
In some examples, in response to a computing device powering on, a protected memory area inaccessible to an operating system is created, where the protected...
US-1,010,2152 Protecting a memory from unauthorized access
A method includes generating a set of virtual-machine-specific (VMS) encryption keys for a dedicated virtual machine, storing the set of VMS encryption keys in...
US-1,010,2151 Protecting a memory from unauthorized access
A method includes generating a set of virtual-machine-specific (VMS) encryption keys for a dedicated virtual machine, storing the set of VMS encryption keys in...
US-1,010,2147 Phased based distributed LRU for shared cache systems
In a system in which a plurality of computing elements share a cache, each computing element owns a stripe of the cache. Each stripe contains cache objects that...
US-1,010,2126 Apparatus and method for implementing a multi-level memory hierarchy having different operating modes
A system and method are described for integrating a memory and storage hierarchy including a non-volatile memory tier within a computer system. In one...
US-1,010,2125 PCI device, interface system including the same, and computing system including the same
A peripheral component interconnect (PCI) device includes a first memory which includes a plurality of page buffers, a base address register which includes a...
US-1,010,2123 Hybrid hardware and software implementation of transactional memory access
Embodiments of the invention relate a hybrid hardware and software implementation of transactional memory accesses in a computer system. A processor including a...
US-1,010,2118 Memory system and non-transitory computer readable recording medium
According to one embodiment, a memory system includes a nonvolatile memory, configuration unit, address translation unit, write unit and control unit. The...
US-1,010,2116 Multi-level page data structure
Methods, systems, and computer program products for receiving a memory allocation request; comparing a memory size corresponding to the memory allocation...
US-1,010,2097 Transaction server performance monitoring using component performance data
Embodiments of the present invention provide a method, system and computer program product for predicting transaction server performance failure in a...
US-1,010,2081 Memory controller system with non-volatile backup storage
The present invention is directed to computer storage systems and methods thereof. More specifically, embodiments of the present invention provide an isolated...
US-1,010,2043 Method and system for mapping an integral into a thread of a parallel architecture
A method is disclosed for mapping an integral into a thread of a parallel architecture, in the course of which the integral is mapped into a summation expressed...
US-1,010,2035 Techniques for computing resource discovery and management in a data center
Examples are described for computing resource discovery and management for a system of configurable computing resources that may include disaggregate physical...
US-1,010,2023 Fair unidirectional multi-queue virtual machine migration
Methods, systems, and computer program products for providing fair unidirectional multi-queue virtual machine migration are disclosed. A computer-implemented...
US-1,010,2020 Methods, systems, and computer readable media for virtual machine (VM) deployment using read-only memory
Methods, systems, and computer readable media for deploying a virtual machine (VM) are disclosed. According to one exemplary method, the method includes...
US-1,010,2017 Timer access from user mode through a shared memory page
A computing system in which a software component executing on a platform can reliably and efficiently obtain state information about a component supported by...
US-1,010,1936 Memory access control
Techniques disclosed herein relate to a method performed on a computing device in response to a request to identify a segment of memory. The method includes...
US-1,010,1935 System and method for providing expandable and contractible memory overprovisioning
A memory module includes one or more memory devices, a memory interface to a host computer, and a memory overprovisioning logic. The memory overprovisioning...
US-1,010,1932 Method and system for providing storage checkpointing to a group of independent computer applications
A method and system for checkpointing at least one application in an application group. At least one full checkpoint and at least one incremental checkpoint are...
US-1,010,1910 Adaptive maximum limit for out-of-memory-protected web browser processes on systems using a low memory manager
Computing devices and methods are provided for increasing the likelihood that one or more processes in a set of linked processes related to an application will...
US-1,010,1897 Electronic stylus for storing credentials
An electronic stylus may include a wireless interface, a memory, and a processor. The wireless interface may be configured to send and receive signals to and...
US-1,010,1802 Massive simultaneous remote digital presence world
Various methods and apparatus are described herein for enabling one or more users to interface with virtual or augmented reality environments. An example system...
US-1,010,1725 System and method for joining workpieces to form an article
A workpiece having at least one physical feature is placed into a workstation fixture having at least one adjustable locator. Measurement data reflecting the...
US-1,010,1050 Dispatch engine for optimizing demand-response thermostat events
A thermostat management server may include one or more processors and one or more memory devices comprising instructions that, when executed by the one or more...
US-1,009,9893 Hoistway communication system
A communication system includes a host node and a plurality of network nodes. The host node has a processor, a non-transitory computer memory, a host receiver,...
US-1,009,9145 Video game recording and playback with visual display of game controller manipulation
A system and method for recording and playback of game data is provided. A recording engine may be configured to record and playback game data, including...
US-1,009,8564 Method, system and apparatus for tracking cortical stimulator locations
A method comprises: storing, in a memory of a computing device, (i) a preoperative image of patient tissue obtained using a first imaging modality and...
US-1,009,7902 System and method for using multiple audio input devices for synchronized and position-based audio
A system for operating multiple audio input devices for synchronized and position-based audio comprising a media computing device comprising a processor, a...
US-1,009,7748 Control apparatus, image pickup apparatus, control method, and non-transitory computer-readable storage medium...
A control apparatus includes an acquisition unit (acquirer 210a) which acquires light source information relating to a light source that illuminates an object,...
US-1,009,7746 Method and system for dynamically adjusting a camera setting for a video stream
In one aspect, an example method for dynamically adjusting a camera setting for a video stream includes: (i) receiving, by a computing system, video content...
US-1,009,7704 Authentication control apparatus, image reading apparatus, and non-transitory computer readable medium
An authentication control apparatus includes a first authenticating unit, a second authenticating unit, a controller, and an outputting unit. The first...
US-1,009,7641 Portable platform for networked computing
In one embodiment, a portable, networked, computing device comprises a processor, a plurality of radios, and a memory. The device may be operable to pair, by at...
US-1,009,7609 Method and system for dynamically adjusting a data rate of a video stream
In one aspect, an example method for dynamically adjusting a data rate of a video stream includes: (i) generating, by a computing system, a video stream...
US-1,009,7563 Reliable and secure firmware update with a dynamic validation for internet of things (IoT) devices
A computing system for a secure and reliable firmware update through a verification process, dynamic validation and continuous monitoring for error or failure...
US-1,009,7473 Mobile device to vehicle output stream packet prioritization
A memory of a mobile device stores a router service, and a plurality of queues. Each queue includes packets from a respective mobile application to be sent over...
US-1,009,7456 Method and an apparatus for a gateway
An apparatus comprises at least one processor and at least one memory including computer code. The at least one memory and the computer code are configured to...
US-1,009,7436 Tunneled monitoring service and method
Some embodiments provide systems and methods to monitor network communications, comprising: a computing device comprising a control circuit and memory with...
US-1,009,7434 Intelligent application diagnostics
System and method of intelligent application diagnostics of a user device (UD). Upon every first time period, the key performance indicators (KPI's) of the...
US-1,009,7369 Attached computing device
Examples of a computing device for attaching to a host computing device are disclosed. In one example implementation according to aspects of the present...
US-1,009,6134 Data compaction and memory bandwidth reduction for sparse neural networks
A method, computer program product, and system for sparse convolutional neural networks that improves efficiency is described. Multi-bit data for input to a...
US-1,009,6132 Method and apparatus for positioning feature point
A feature point positioning apparatus includes a memory storing computer-executable instructions; and one or more processors configured to execute the...
US-1,009,6079 Fragment shaders perform vertex shader computations
Graphics processing may include implementing a vertex shader and a pixel shader with the GPU. Vertex indices output from a vertex shader may be written to a...
US-1,009,6030 Apparatus, computer program, and method for generating a problem ticket with a link to a cloned environment
An apparatus, computer program, and method are provided for generating a problem ticket with a link to a cloned environmental state. At least one problematic...
US-1,009,6023 Encryption and tokenization architectures
Various embodiments of the present invention are directed to methods, systems and computer program products for conducting an online transaction on a website...
US-1,009,6008 Methods and systems for processing electronic disbursements
A disbursement module (DM) computer device is provided for processing an electronic disbursement. The DM computer device includes a memory device and a...
US-1,009,5937 Apparatus and method for predicting targets of visual attention
An apparatus for tracking a gaze of a user is provided. The apparatus includes a memory including computer executable instructions; and a processor that reads...
US-1,009,5912 Biological image processing device, biological image processing method, and computer-readable non-transitory medium
A biological image processing device includes: a memory; and a processor coupled to the memory and the processor configured to execute a process, the process...
US-1,009,5868 Event-based apparatus and method for securing bios in a trusted computing system during execution
An apparatus is provided for protecting a basic input/output system (BIOS) in a computing system. The apparatus includes a BIOS read only memory (ROM), an event...
US-1,009,5822 Memory built-in self-test logic in an integrated circuit design
In one aspect, electronic design automation systems, methods, and non-transitory computer readable media are presented for adding a memory built-in self-test...
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