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Searching: computer memory





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Patent # Description
US-9,430,811 Graphics processor with non-blocking concurrent architecture
In some aspects, systems and methods provide for forming groupings of a plurality of independently-specified computation workloads, such as graphics processing...
US-9,430,740 Deciding an optimal action in consideration of risk
A method and system for deciding an optimal action in consideration of risk. The method includes the steps of: generating sequentially, by way of a Markov...
US-9,430,650 Method for managing memory space in a secure non-volatile memory of a secure element
The invention relates to a method for managing non-volatile memory space in a secure processor comprising a secure non-volatile internal memory, the method...
US-9,430,596 System, method and apparatus for a scalable parallel processor
A system and method of parallel processing includes a computer system including a first processor, the first processor being a control flow type processor, a...
US-9,430,595 Managing model checks of sequential designs
A method, system or computer usable program product for model checking a first circuit model including determining whether the first circuit model is...
US-9,430,560 Earned media generation
An illustrative method for generating earned media includes collecting publisher descriptor data from a plurality of publishers, storing the descriptor data in...
US-9,430,534 Systems and methods for improved security and precision in executing analytics using SDKS
This disclosure generally relates to computer-implemented analytics, and more particularly to systems and methods for improved security and precision in...
US-9,430,508 Disk optimized paging for column oriented databases
Implementing a database system using a plurality of sequentially ordered drives to store sequential portions of columns of the database, but where the database...
US-9,430,489 Computer, data storage method, and information processing system
A computer includes a memory that stores a program and received data; and a processor that executes an operation by executing the program stored in the memory,...
US-9,430,448 System and methods for the cluster of media
A computer implemented method for the cluster of media, the method comprises, selecting a media search source via a user interface; providing a form-based...
US-9,430,437 PCIE lane aggregation over a high speed link
A computer network system configured with disaggregated inputs/outputs. This system can be configured in a leaf-spine architecture and can include a router...
US-9,430,415 Concurrent dumping of large address space
A method for managing concurrent system dumps of address spaces of memory of a computing system. The method comprises analyzing address space of memory to...
US-9,430,403 Optimizing system memory usage
A computer determines whether a page boundary of a page has been crossed by a function. Based on the computer determining that the page boundary has been...
US-9,430,402 System and method for providing stealth memory
The described implementations relate to computer memory. One implementation provides a technique that can include providing stealth memory to an application....
US-9,430,400 Migration directives in a unified virtual memory system architecture
One embodiment of the present invention sets forth a computer-implemented method for altering migration rules for a unified virtual memory system. The method...
US-9,430,391 Managing coherent memory between an accelerated processing device and a central processing unit
Existing multiprocessor computing systems often have insufficient memory coherency and, consequently, are unable to efficiently utilize separate memory systems....
US-9,430,372 Apparatus, method and system that stores bios in non-volatile random access memory
A non-volatile random access memory (NVRAM) is used in a computer system to perform multiple roles in the platform storage hierarchy. The NVRAM is ...
US-9,430,304 Method and system for block scheduling control in a processor by remapping
A method and a system for block scheduling are disclosed. The method includes retrieving an original block ID, determining a corresponding new block ID from a...
US-9,430,282 Scheduling multiple tasks in distributed computing system to avoid result writing conflicts
Systems and methods are provided for processing a computing task divided into a plurality of discrete tasks using a plurality of data processors. The system...
US-9,430,281 Heterogeneous enqueuing and dequeuing mechanism for task scheduling
Methods, systems and computer-readable mediums for task scheduling on an accelerated processing device (APD) are provided. In an embodiment, a method comprises:...
US-9,430,266 Activating a subphysical driver on failure of hypervisor for operating an I/O device shared by hypervisor and...
A control method for an I/O device, the I/O device being shared by a hypervisor and a first guest OS, the hypervisor comprising a physical driver for using a...
US-9,430,261 Controlling apparatus, and controlling method
A controlling method realized by a computer connected to a plurality of physical devices in which respective virtual machines (VMs) are operated and a process...
US-9,430,249 Image forming apparatus, memory access control method, and non-transitory computer-readable recording medium...
A memory access control system includes a plurality of operators, a first memory, and a second memory. The plurality of operators are configured to execute...
US-9,430,245 Efficient branch predictor history recovery in pipelined computer architectures employing branch prediction and...
A pipelined processor employs branch prediction based on branch source instructions situated in a last one of a variable number of branch delay slots associated...
US-9,430,236 Code stack management
Embodiments relate to code stack management. An aspect includes a processor configured to execute a software application. Another aspect includes a code stack...
US-9,430,233 Compiler method for generating instructions for vector operations in a multi-endian instruction set
A compiler includes a vector instruction processing mechanism that generates instructions for vector instructions in a way that assures correct operation in a...
US-9,430,220 Method, medium, and apparatus for re-programming flash memory of a computing device
A method of re-programming flash memory of a computing device is presented here. Software content having a plurality of software modules can be re-programmed by...
US-9,430,217 Method and apparatus for patching
A method for patching an application running in a computing system , the method comprising: in response to that there is a need to patch a first content and the...
US-9,430,206 Systems for downloading location-based application and methods using the same
Systems for downloading location-based applications and associated methods are disclosed. The system can include a memory storing computer-executable...
US-9,430,167 Sequential read request management in data storage system environment
A host-based memory is maintained for a host computing device. Data obtained from a storage array in response to one or more read requests is stored in the...
US-9,430,151 Multi-level memory with direct access
Examples of a multi-level memory with direct access are described. Examples include designating an amount of a non-volatile random access memory (NVRAM) for use...
US-9,430,001 Modular computing device
Modular computing device techniques are described. In one or more implementations, a computing device includes a display modular component including a housing,...
US-9,429,469 Apparatus and method for measuring optical component
An apparatus for measuring an optical component (160, 170, 190) of the apparatus, the apparatus comprising a radiation source (130) configured to form a...
US-9,426,726 Systems, methods, and computer program products for managing access to femtocell coverage
Systems, methods, and computer program products are for managing access to a femtocell coverage area. An exemplary method includes storing in a memory component...
US-9,426,652 High assurance authorization device
Methods and apparatus are provided for securing the transfer of data over the internet from malicious interference. The apparatus comprises a computing device...
US-9,426,605 Cross device information exchange using gestures and locations
A method, apparatus and software related product (e.g., a computer readable memory) are presented for exchanging information between two or more devices when...
US-9,426,319 Image reading apparatus and non-transitory computer readable medium
An image reading apparatus includes a document feeder, a platen, an image reader, a drive unit, a memory, and a controller. The controller is configured to...
US-9,426,287 System and method for automatic call scheduling
A computer system for connecting a user to a scheduled call, including a processor in communication with non-volatile memory and code for receiving a user phone...
US-9,426,168 Fast-flux detection utilizing domain name system information
A processing device comprises a processor coupled to a memory and is configured to determine a first set of features from domain name system (DNS) information,...
US-9,425,965 Cryptographic certification of secure hosted execution environments
Implementations for providing a persistent secure execution environment with a hosted computer are described. A host operating system of a computing system...
US-9,424,944 Detecting voltage threshold drift
Apparatuses, systems, methods, and computer program products are disclosed for detecting voltage threshold drift. A method includes programming a predetermined...
US-9,424,896 Method and system for fast initialization of a memory unit
Embodiments of a method for operating a computer system are disclosed. In one embodiment, the memory unit has a non-volatile memory array and processing logic...
US-9,424,683 Transposing apparatus, transposing method, and computer product
A transposing apparatus is configured by a computer controlling a computing device having computing elements arranged into a matrix and memory devices connected...
US-9,424,613 Method, system and apparatus for load shaving of a power grid and a tangible computer readable medium
The present disclosure provides a system, method and apparatus for load shaving of a power grid, and a tangible computer readable medium. The system may...
US-9,424,565 System and method for preparing and delivering informational content
At least one content publishing server having a memory storing a map data structure configured by a content author which defines relationships among plural...
US-9,424,533 Method and system for predicting an outcome of an event
Specification covers new algorithms, methods, and systems for artificial intelligence, soft computing, and deep learning/recognition, e.g., image recognition...
US-9,424,521 Computer-implemented systems and methods of analyzing spatial, temporal and contextual elements of data for...
A computer-implemented system and method of analyzing spatial, temporal and contextual elements of data for predictive decision-making. The computer-implemented...
US-9,424,512 Directed behavior in hierarchical temporal memory based system
A hierarchy of computing modules is configured to learn a cause of input data sensed over space and time, and is further configured to determine a cause of...
US-9,424,502 System for generating an incrementally completed security mark
A system for generating an incrementally completed security mark includes a computer-readable medium encoded with a computer program. The computer program...
US-9,424,501 Information processing device capable of outputting print data to print device, and control method thereof
In case of searching and outputting output information stored in a memory, it enables a user of the host computer to select the device of storing the output...
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