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Searching: computer memory





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Patent # Description
US-9,417,819 Cache device for hard disk drives and methods of operations
A solid-state mass storage device adapted to be used as a cache for an hard disk drive that utilizes a more efficient logical data management method relative to...
US-9,417,805 Exporting computational capabilities into a block-oriented disk memory
A memory controller is provided that includes a host system interface that receives requests from applications and sends read or write commands to a disk for...
US-9,417,801 Virtual general-purpose I/O controller
Technologies for virtual general purpose I/O (GPIO) include a computing device having a virtual GPIO controller driver, a virtual GPIO controller firmware...
US-9,417,797 Estimating read reference voltage based on disparity and derivative metrics
An adaptive channel tracking algorithm performed by a flash memory system obtains disparity metrics and derivative metrics and uses a combination of the...
US-9,417,754 User interface system, method, and computer program product
A system, method, and computer program product are provided for a touch or pressure signal-based interface. In operation, a touch or pressure signal is received...
US-9,417,694 System and method for haptic display of data transfers
A method is disclosed for transferring digital information from a first electronic device to a second electronic device. In one example, the first device is a...
US-9,417,684 Mechanism for facilitating power and performance management of non-volatile memory in computing devices
A mechanism is described for facilitating power governance of non-volatile memory devices using a power governing mechanism employed at a computing device...
US-9,415,305 Adaptive difficulty in a multiplayer gaming environment
Embodiments of the present invention provide a method, system and computer program product for adapting game difficulty through dynamic map generation in a...
US-9,414,421 Direct communication among devices
Method, operation of a method, and a result of execution of computer program instructions embodied on a non-transitory computer readable memory in a mobility...
US-9,414,366 Timeslot allocation in uplink CDMA
The invention relates to an apparatus including at least one processor and at least one memory including a computer program code, the at least one memory and...
US-9,414,344 Communication system, communication apparatus, and computer-readable medium including communication program and...
A system includes a first apparatus including a memory and a processor coupled to the memory, wherein the first apparatus is configured to transmit packets; and...
US-9,414,200 Optimization of a backhaul connection in a mobile communications network
A system, a method, a device, and a computer program product for transmission of data between a user device and a server. A first data received from the user...
US-9,414,181 Device, computer-readable medium, and method for retaining services
A portable device includes a processor; a receiver configured to receive a first message, the first message comprising a notification and a first instruction; a...
US-9,414,102 System and method for dayparting audio-visual content
A computer implemented method for organizing and delivering audio-visual online content, having: on a computing device having one or more processors and a...
US-9,413,881 Identifying recorded call data segments of interest
A method and apparatus of processing a voice call are disclosed. One example method of operation may include recording at least a portion of a conference call...
US-9,413,807 Browser rendering and computation
A method dynamically assigns tasks for visually presenting data. A server receives a request, from a client device, to display a visual representation of data...
US-9,413,765 Multinode hubs for trusted computing
Embodiments of multinode hubs for trust operations are disclosed herein. In some embodiments, a multinode hub may include a plurality of memory regions, a...
US-9,413,546 QOS provisioning in a network having dynamic link states
A network node for a network having dynamic link states includes a processing unit and computer-readable memory for causing the processing unit to monitor a...
US-9,413,538 Cryptographic certification of secure hosted execution environments
Implementations for providing a secure execution environment with a hosted computer are described. A security-enabled processor establishes a hardware-protected...
US-9,413,473 System, method and computer storage medium for calibrating RF transceiver
Disclosed is a system, method and computer storage medium for calibrating a Radio Frequency (RF) transceiver, and the system includes a compensator for a...
US-9,413,260 Method of current control of three-phase modular multilevel converter with inductance changes allowed
Current of a three-phase multilevel modular converter (MMC) is controlled. The control is a division-summation (D-.SIGMA.) method yet uses integration to...
US-9,412,118 Systems and methods for providing offers using a mobile device
A wireless device is enabled to provide offers. The wireless device receives card data for a financial account card and stores the card data in a memory...
US-9,412,069 Information infrastructure enabling mind supportable by universal computing devices
Methods and systems provide the infrastructure supporting an omniphysical mind or descriptive self supportable by a computing device. The infrastructure...
US-9,412,030 Visualization of defects in a frame of image data
Disclosed are systems, computer-readable mediums, and methods for receiving, from a camera, a frame representing image data prior to the image data being saved...
US-9,411,979 Embedding secret data in code
In a computer system operable at more than one privilege level, an application is securely customized to use secret data without disclosing the secret data to a...
US-9,411,964 Characterizing, detecting and healing vulnerabilities in computer code
An example process includes identifying, by one or more processing devices, a location in computer code that is subject to vulnerability, where the location...
US-9,411,961 Extension component for authenticating game data
Disclosed are methods, apparatus and systems, including computer program products, implementing and using techniques for authenticating data for playing a game...
US-9,411,931 Method, apparatus and computer program product for receiving digital data files
A method, apparatus and computer program product are provided to efficiently receive digital imaging data files, regardless of their size. For a respective data...
US-9,411,910 Dental analysis method and system
A system for designing the dentition of a patient, comprising a first input for providing an image of the smile of the patient to the system, an output, a...
US-9,411,908 Architecture for TCAM sharing
Aspects of the disclosure provide a packet processing system. The packet processing system includes a plurality of processing units, a ternary content...
US-9,411,853 In-memory aggregation system and method of multidimensional data processing for enhancing speed and scalability
An in-memory aggregation (IMA) system having a massive parallel hardware (HW) accelerated aggregation engine uses the IMA for providing maximal utilization of...
US-9,411,838 Table organization using one or more queries
A method, system and computer program product are provided for reorganizing a database table according to a set of queries. More specifically, the table is...
US-9,411,736 System and method for an accelerator cache based on memory availability and usage
The storage processor of a data storage system such as a storage array automatically configures one or more accelerator caches ("AC") upon detecting the...
US-9,411,735 Counter-based wide fetch management
Embodiments relate to counter-based wide fetch management. An aspect includes assigning a counter to a first memory region in a main memory that is allocated to...
US-9,411,729 Salvaging lock elision transactions
A transactional memory system salvages hardware lock elision (HLE) transactions. A computer system of the transactional memory system records information about...
US-9,411,726 Low power computation architecture
An embodiment includes a system, comprising a first memory; a plurality of first circuits, wherein each first circuit is coupled to the memory; and includes a...
US-9,411,715 System, method, and computer program product for optimizing the management of thread stack memory
A system, method, and computer program product for optimizing thread stack memory allocation is disclosed. The method includes the steps of receiving source...
US-9,411,652 Runtime for automatically load-balancing and synchronizing heterogeneous computer systems with scoped...
Sharing tasks among compute units in a processor can increase the efficiency of the processor. When a compute unit does not have a task in its task memory to...
US-9,411,639 System and method for managing network navigation
A file comprising an application and data corresponding to a status of the application at a particular time is maintained in a first memory of a user device,...
US-9,411,633 System and method for barrier command monitoring in computing systems
A computing system for handling barrier commands includes a memory, an interface, and a processor. The memory is configured to store a pre-barrier spreading...
US-9,411,608 Method and apparatus for enhancing a hibernate and resume process for a computing device having an external...
Before hibernating a computing device (102), system software components (116) are notified of an upcoming hibernation process. The notifications are conveyed...
US-9,411,599 Operand fetching control as a function of branch confidence
Data operand fetching control includes a computer processor that includes a control unit for determining memory access operations. The control unit is...
US-9,411,598 Semi-exclusive second-level branch target buffer
Embodiments relate to a semi-exclusive second-level branch target buffer. An aspect includes a computer-implemented method for a semi-exclusive second-level...
US-9,411,566 System and method for removal of arraycopies in java by cutting the length of arrays
A system and method for removal of array copies in Java by reusing a source array for the target array and potentially cutting the length of the source array....
US-9,411,533 Snapshots and versioning of transactional storage class memory
A system and method enables efficient implementation of snapshots of data organized as arbitrary data structures on a byte-addressable persistent memory of a...
US-9,411,520 Method and apparatus for embedded systems reprogramming
A reprogramming device is used for reprogramming embedded systems. The reprogramming device comprises a microprocessor, a memory programmed with software to...
US-9,411,519 Implementing enhanced performance flash memory devices
A method and apparatus for implementing performance in a flash memory system in a computer system. A flash memory chip includes a function engine performing...
US-9,411,518 Method, computer program product and apparatus for accelerating responses to requests for transactions...
Responding to IO requests made by an application to an operating system within a computing device implements IO performance acceleration that interfaces with...
US-9,411,465 Systems and methods for generating a secure locking interface
Systems and methods for generating a secure locking interface on a touch-screen display of a computing device are disclosed. The system comprises a processor, a...
US-9,411,439 Input device with a customizable contour
Certain embodiments of the invention include an input device (e.g., a computer mouse) including a processor, a housing including a top side, the housing...
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