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Searching: computer memory





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Patent # Description
US-9,440,264 Method and system for weighing mail pieces
A method and system is described for determining the physical weights of flat articles being sorted without actually weighing the articles. Such a method...
US-9,439,330 3D IC computer system
A computer system includes central processing units designed by using reduced instruction set computing (RISC) strategy, dynamic random access memory (DRAM)...
US-9,438,955 System and/or method for distributing media content
There is provided a method for use by a media device including a computing platform having a processor, a display, a memory, and a rendering application in the...
US-9,438,727 System and method to track and log mobile communication device call status when the device is not in possession
A mobile device logging and tracking system permits a communicative association between a mobile device and a receiving device. When the mobile device...
US-9,438,678 Methods and systems for appliance community service management
A method and system for networking a plurality of appliances. The method and system include providing an appliance on a network, controlling operation of the...
US-9,438,638 Method for transparently connecting augmented network socket operations
A method at one or more computers having memory and one or more processors includes detecting establishment of a connection between a first process and a second...
US-9,438,623 Computer exploit detection using heap spray pattern matching
According to one embodiment, a threat detection system is integrated with at least a dynamic analysis engine. The dynamic analysis engine is configured to...
US-9,438,417 System and method for shared key agreement over untrusted communication channels
A method of generating cryptographic keys includes generating, with a first processor in a first computing device, error correction data corresponding to first...
US-9,438,414 Virtualized SHA computational engine
A computational engine may comprise a working memory configured to receive a first input message and a second input message, a context memory coupled with the...
US-9,438,238 Data processing apparatus, data processing method, and non-transitory computer readable medium having...
Provided is a data processing apparatus including a reconfigurable circuit that has a dynamically-reconfigurable circuit configuration to execute data...
US-9,437,327 Combined rank and linear address incrementing utility for computer memory test operations
Embodiments include a combined rank and linear memory address incrementing utility. An aspect includes an address incrementing utility suitable for...
US-9,437,045 Real-time mobile capture and application of photographic images as textures in three-dimensional models
A computer-implemented method for obtaining texture data for a three-dimensional model is disclosed. The method is performed at a portable electronic device...
US-9,436,972 System coherency in a distributed graphics processor hierarchy
Methods and systems may provide for executing, by a physically distributed set of compute slices, a plurality of work items. Additionally, the coherency of one...
US-9,436,922 System and method for integrated workflow scaling
A system is provided. The system comprises a first computer located in a first plant, a first memory, and a first object based process management application...
US-9,436,847 Cryptographic pointer address encoding
A computing device includes technologies for securing indirect addresses (e.g., pointers) that are used by a processor to perform memory access (e.g.,...
US-9,436,845 Physically unclonable fuse using a NOR type memory array
A method for identifying an unclonable chip uses hardware intrinsic keys and authentication responses employing intrinsic parameters of memory cells invariant...
US-9,436,823 System and method for detecting malicious code
A method and apparatus are provided to detect malicious code in a computing system, where the malicious code is obscured by manipulation of an input/output...
US-9,436,791 Optimizing placement of circuit resources using a globally accessible placement memory
A method, executed by one or more processors, for optimizing placement of a logic network, includes partitioning a logic network into a set of logic partitions,...
US-9,436,777 Method and system for causing a browser to preload web page components
Disclosed is a server computer that receives, over a network from a computing device, a request for a search suggestion related to a search query that is input...
US-9,436,774 Dynamic linking in sharepoint (TM)
Provided is a data management system, computer-readable medium and method including extensions to SHAREPOINT.TM.. The system includes a computer processor...
US-9,436,769 Automatic device upload configuration
Various embodiments of the present technology involve the configuration of a wireless-enabled memory card. For example, a client application associated with a...
US-9,436,651 Method and apparatus for managing application state in a network interface controller in a high performance...
Methods related to communication between and within nodes in a high performance computing system are presented. Processing time for message exchange between a...
US-9,436,624 Circuitry for a computing system, LSU arrangement and memory arrangement as well as computing system
A circuitry for a computing system comprising a first load/store unit, LSU, and a second LSU as well as a memory arrangement. The first LSU is connected to the...
US-9,436,614 Application-directed memory de-duplication
In a computing system including an application executing on top of a virtualization control layer, wherein the virtualization control layer maps portions of a...
US-9,436,612 Sizing a write cache buffer based on emergency data save parameters
Embodiments relate to saving data upon loss of power. An aspect includes sizing a write cache buffer based on parameters related to carrying out this emergency...
US-9,436,604 System and method for software/hardware coordinated adaptive performance monitoring
System and method embodiments are provided for coordinated hardware and software performance monitoring to determine a suitable polling time for memory cache...
US-9,436,595 Use of application data and garbage-collected data to improve write efficiency of a data storage device
A data storage device includes a plurality of flash memory devices. A memory controller is configured to receive a request from a host computing device to write...
US-9,436,561 Recovery processing using torn write detection
The recovery of a transaction, and perhaps the recovery of multiple transactions, in a computing system in which one or more persistent systems are coupled via...
US-9,436,536 Memory dump method, information processing apparatus, and non-transitory computer-readable storage medium
A memory dump method includes performing information processing using a first partition including a first device board and a second device, detecting an error...
US-9,436,515 Tenant virtualization controller for exporting tenant without shifting location of tenant data in a...
A system and method for performing load balancing of systems in a multi-tenancy computing environment by shifting tenants from an overloaded system to a...
US-9,436,504 Techniques for managing the execution order of multiple nested tasks executing on a parallel processor
One embodiment of the present disclosure sets forth an enhanced way for GPUs to queue new computational tasks into a task metadata descriptor queue (TMDQ)....
US-9,436,480 Firmware RAM usage without overlays
Systems and methods are disclosed for managing program code in a computing device, such as an embedded system. In a data storage device, a non-volatile memory...
US-9,436,450 Method and apparatus for optimising computer program code
A method and apparatus for optimizing computer program code. The method comprises identifying at least one set of candidate instructions within the computer...
US-9,436,401 Computer memory data security
A memory module determines that the memory module is connected to a memory module connector. The memory module receives the connector ID from the connector and...
US-9,436,396 Scheduling of reconstructive I/O read operations in a storage environment
A system and method for effectively scheduling read and write operations among a plurality of solid-state storage devices. A computer system comprises client...
US-9,436,395 Mechanisms to save user/kernel copy for cross device communications
Central processing units (CPUs) in computing systems manage graphics processing units (GPUs), network processors, security co-processors, and other data heavy...
US-9,436,386 Shared reference counters among a plurality of virtual storage devices
A system, method, and computer program product are provided for implementing shared reference counters among a plurality of virtual storage devices. The method...
US-9,436,362 OData service provisioning on top of GenIL layer
The disclosure generally describes computer-implemented methods, software, and systems for allowing provisioning of open data protocol (OData) services on top...
US-9,436,251 Fast platform hibernation and resumption of computing systems
Fast platform hibernation and resumption for computing systems. An embodiment of an apparatus includes a volatile system memory, a nonvolatile memory, and a...
US-9,435,698 Monitoring systems and methods
A monitoring system includes a plurality of modules to sense temperature and vibrations of a motor assembly, a hub computer to collect the sensed temperature...
US-9,434,314 Electronic accessory system for a vehicle
An electronic accessory system for a vehicle includes an accessory module housing electronics, which includes a CMOS camera and a vehicle bus node and a digital...
US-9,433,867 Video game with backwards-compatible toys
Aspects of the present invention relate to a computer-implemented method useful in playing a video game having multiple versions, the method being implemented...
US-9,432,873 Differentiation of traffic flows for uplink transmission
In accordance with an example embodiment of the present invention, an apparatus comprising: at least one processor; and at least one memory including computer...
US-9,432,614 Integrated downscale in video core
Implementations include video image processing systems, methods, and apparatus for integrated video downscale in a video core. The downscaler computes and...
US-9,432,461 Methods, devices, systems, and computer program products for managing and delivering media content
An aspect of managing media content includes a memory device and a processor communicatively coupled to the memory device. The processor executes program...
US-9,432,437 Dynamic telemetry client message routing
A dynamic telemetry client message routing system is provided. The system comprises a provisioning application stored in a memory of a computer system that,...
US-9,432,408 Signalling gateway, method, computer program and computer program product for communication between HTTP and SIP
A signalling gateway is arranged to allow a first client using hypertext transfer protocol, HTTP, to initiate a real-time connection to a SIP, session...
US-9,432,407 Providing and accessing data in a standard-compliant manner
In certain embodiments, a computer-implemented method includes receiving intercepted data associated with a first entity. The intercepted data may be...
US-9,432,397 Preboot environment with system security check
Booting an operating system that includes a secure preboot environment that performs integrity checks against security threats. A computer system boots to a...
US-9,432,298 System, method, and computer program product for improving memory systems
A system, method, and computer program product are provided for a memory system. The system includes a first semiconductor platform including at least one first...
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