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Searching: cpu processor





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Patent # Description
US-8,090,674 Integrated system and method for multichannel neuronal recording with spike/LFP separation, integrated A/D...
A CMOS integrated circuit for multi-channel neuronal recording with twelve true-differential channels, band separation and digital offset calibration. The...
US-8,087,905 Cooling apparatus for an electronic device to be cooled
The invention relates to a cooling apparatus for an electric component such as a CPU, a memory or power semiconductor, such as transistors or LEDs, or a...
US-8,078,858 Manufacturing boot process with minimal component initialization
A test mode initialization system includes beginning a power-on self-test (POST) wherein the POST may be performed to determine whether a system under test is...
US-8,074,005 Data processor and control system
Provided are a data processor, and a control system, in which an interrupt controller and an event link controller are adopted. The event link controller...
US-8,069,444 Method and apparatus for achieving fair cache sharing on multi-threaded chip multiprocessors
In a computer system with a multi-core processor having a shared cache memory level, an operating system scheduler adjusts the CPU latency of a thread running...
US-8,069,344 System and method for analyzing CPU performance from a serial link front side bus
Monitoring of boot progress for a multiprocessor information handling system is performed with a test module running on a CPLD. RAM integrated in the CPLD...
US-8,065,501 Indexing a translation lookaside buffer (TLB)
A processor is to comprise a central processing unit (CPU), an address generation unit (AGU), an index generation unit and a translation look-aside buffer...
US-8,065,026 Vehicle computer system with audio entertainment system
A vehicle computer system has an audio entertainment system implemented in a logic unit and audio digital signal processor (DSP) independent from the host CPU....
US-8,055,927 Structure for analyzing dynamic CPU voltage
A design structure embodied in a machine readable storage medium for designing, manufacturing, and/or testing a system is disclosed for monitoring a voltage...
US-8,055,819 Information processor
An information processor (program processing unit 1) for managing a data sequence in a fixed order comprises a direction array (reference data storage section...
US-8,051,315 Power throttling apparatus
Disclosed is an apparatus which deactivates both the AC as well as the DC component of power for various functions in a CPU. The CPU partitions dataflow...
US-8,046,465 Flow scheduling for network application apparatus
A method and system for distributing flows between a multiple processors. The flows can be received from an external source such as a network, by a front-end...
US-8,037,468 Methods for synchronous code retrieval from an asynchronous source
The present invention discloses methods for delivering code to a host system including the steps of: accepting a CPU request, from a host-system processor of...
US-8,035,829 Image processing apparatus, magnification ratio distribution determination method, program, and recording medium
The present invention increases output throughput and enhances user-friendliness by subjecting image data to magnification processing by an optimal image...
US-8,032,679 Device and method for controlling network processing mode, and non-transitory computer-readable medium...
A network control device including a network controller for transmitting/receiving data through a network and storing received data in a storage and a network...
US-8,029,351 Gaming machine including a wheel and a processor to specify a pocket of the wheel
As a result of lottery using the roulette device 3, if the ball 27 enters in the bonus pocket 24 among the pockets formed on the wheel 22, the special bonus...
US-8,028,182 Dynamic CPU voltage regulator phase shedding
A voltage regulator phase shedding system includes one or more subsystems to receive a system management interrupt (SMI), gather processor utilization...
US-8,027,808 Methods and systems for estimating throughput of a simultaneous multi-threading processor
Methods and systems are disclosed for determining a CPU usage adjustment factor and for automatically applying the CPU usage adjustment factor to provide a CPU...
US-8,022,966 Video, audio and graphics decode, composite and display system
A video, audio and graphics system uses multiple transport processors to receive in-band and out-of-band MPEG Transport streams, to perform PID and section...
US-8,019,809 Tightly-coupled disk-to-CPU storage server
A storage server for efficiently retrieving data from a plurality of disks in response to user access requests. The server comprises a plurality of processors...
US-8,019,151 Methods and apparatus for image compression and decompression using graphics processing unit (GPU)
The invention provides, in some aspects, methods for image compression that utilize the central processing unit (CPU) of a digital data processor and its...
US-8,018,784 Semiconductor device and data processor
To improve the speed of accessing a low-speed circuit block from a high-speed circuit block without significantly increasing power consumption. Ina data...
US-8,015,568 Disk drive/CPU architecture for distributed computing
A disk drive is described which executes distributed computing tasks including a CPU and associated memory. The communication interface with the host computer...
US-8,015,335 Performing a configuration virtual topology change and instruction therefore
In a logically partitioned host computer system comprising host processors (host CPUs) partitioned into a plurality of guest processors (guest CPUs) of a guest...
US-8,010,821 Systems and methods for wake on event in a network
Embodiments include systems and methods for allowing a host CPU to sleep while service presence packets and responses to search requests are sent by an...
US-8,010,802 Cryptographic device having session memory bus
Provided is a cryptographic device performing encryption or decryption on input data, and more particularly, a cryptographic device having a session memory bus...
US-8,001,402 Method for power capping with co-operative dynamic voltage and frequency scaling via shared p-state table
A co-operative mechanism in which a service processor and a host CPU (with an as running thereupon) work together to implement both power capping and...
US-8,001,290 Vehicle computer system with audio entertainment system
A vehicle computer system has an audio entertainment system implemented in a logic unit and audio digital signal processor (DSP) independent from the host CPU....
US-8,000,493 Method and system for watermark embedding in a multimedia system-on-chip
Methods and systems for watermark embedding in a multimedia system-on-chip are disclosed and may comprise decrypting an encrypted and signed watermarking signal...
US-7,999,845 Electronic endoscope system
In an electronic endoscope system, an RF signal is produced through quadrature modulation of a picture signal that is representative of an image taken through...
US-7,996,821 Data processor
A data processor having a debugging aid function capable of monitoring a plurality of kinds of internal buses from the outside and identifying each of the buses...
US-7,996,696 Updating kernel affinity for applications executing in a multiprocessor system
A multiprocessor system dynamically updates CPU affinities for processes executing on processors of the multiprocessor system based on an external signal. The...
US-7,996,660 Software controlled CPU pipeline protection
A processor in a digital system executes instructions in an instruction execution pipeline. The processor detects a pipeline protection directive while...
US-7,991,514 Processor temperature measurement through median sampling
Temperature readings obtained within a computer system from the location of monitored circuit elements may be oversampled at least three times, and a median...
US-7,984,301 Bi-processor architecture for secure systems
Systems, methods and program products for a first central processing unit (CPU) configured to perform tasks that do not require manipulation of sensitive...
US-RE42,535 Optical disc drive and method of examining the optical disc drive
An optical disc drive for recording and playing back a recordable-type optical disc includes a driving mechanism for rotating the optical disc, an optical...
US-7,975,161 Reducing CPU and bus power when running in power-save modes
A processing system includes a bus and a processor whose core is constrained to have one or more core clock signal frequencies no lower than a predetermined...
US-7,971,073 Adaptive real-time methodology for optimizing energy-efficient computing
Dynamic voltage and frequency scaling (DVFS) is an effective way to reduce energy and power consumption in microprocessor units. Current implementations of DVFS...
US-7,971,048 System and method for establishing a trust domain on a computer platform
Embodiments of the invention provide systems and methods associated with a measurement engine in a server platform. In one such embodiment of the invention, the...
US-7,965,414 Systems and methods for detecting image quality defects
An approach for detecting and correcting printing system print quality defects is disclosed that allows defects to be corrected based on an analysis of image...
US-7,958,314 Target computer processor unit (CPU) determination during cache injection using input/output I/O) hub/chipset...
A method, system, and computer program product for target computer processor unit (CPU) determination during cache injection using I/O hub/chipset resources are...
US-7,958,313 Target computer processor unit (CPU) determination during cache injection using input/output (I/O) adapter...
A method, system, and computer program product for target computer processor unit (CPU) determination during cache injection using input/output (I/O) adapter...
US-7,957,401 System and method for using multiple communication protocols in memory limited processors
A system and method for implementing large and/or multiple telecommunication protocols utilizing memory-limited processors. Telecommunication protocols are...
US-7,951,074 Endoscope device
An endoscope device is proposed for dealing with an erroneous operation of a surgeon. An endoscope device has an endoscope and a processor, wherein the...
US-7,949,801 Main processor initiating command timing signal via DMA to coprocessor in order to synchronize execution of...
Coprocessor systems for using a main microprocessor DMA channel to write to a port to control a coprocessor system are provided. In certain examples,...
US-7,945,915 Efficient operating system interposition mechanism
Methods and systems for efficiently interpreting operating system service requests on the same register or vector of a processor or CPU where the operating...
US-7,941,805 Affinity dispatching load balancer with precise CPU consumption data
A computer-implemented method for distributing a plurality of tasks over a plurality of processing nodes in a processor network includes the following steps:...
US-7,941,652 Apparatus and computer program product for implementing atomic data tracing
A method, apparatus and computer program product are provided for implementing atomic data tracing in a processor system including an auxiliary processor unit...
US-7,936,395 Printer CPU with VLIW processor
A controller is provided having an interface for receiving data and a very long instruction word (VLIW) processor connected to the interface for processing the...
US-7,934,032 Interface for establishing operability between a processor module and input/output (I/O) modules
Described are electronics systems and methods for distributing a limited number of lanes of a PCI Express-based processor (CPU) module among a plurality of PCI...
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