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Searching: cpu processor





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Patent # Description
US-7,631,196 Method and apparatus for loading a trustable operating system
A method and apparatus is provided in which a trustable operating system is loaded into a region in memory. A start secure operation (SSO) triggers a join secure...
US-7,629,999 Printer CPU with VLIW processor
A processor for controlling a printer, the processor comprising: an input interface for receiving input image data; and, a very long instruction word (VLIW)...
US-7,627,684 Network interface device that can offload data transfer processing for a TCP connection from a host CPU
An intelligent network interface card (INIC) or communication processing device (CPD) works with a host computer for data communication. The device provides a...
US-7,624,442 Memory security device for flexible software environment
A semiconductor integrated circuit includes a processor for executing application code from a memory and a verifier processor arranged to receive the application...
US-7,624,295 Processor system, instruction sequence optimization device, and instruction sequence optimization program
To reduce power consumption of a processor system including a plurality of processors without degradation of the processing ability, a CPU detects mode setting...
US-7,624,236 Predictive early write-back of owned cache blocks in a shared memory computer system
A method for predicting early write back of owned cache blocks in a shared memory computer system. This invention enables the system to predict which written...
US-7,617,360 Disk array apparatus and method of controlling the same by a disk array controller having a plurality of...
To efficiently manage performance resources while preventing a failure of a control processing from affecting another control processing in a disk array...
US-7,617,346 Rapid input/output doorbell coalescing to minimize CPU utilization and reduce system interrupt latency
Status/error reporting is implemented using a doorbell system. A plurality of flag registers are included on a system device, such as a serial buffer. Each flag...
US-7,609,902 Implementation of discrete cosine transformation and its inverse on programmable graphics processor
The discrete cosine transform (DCT) is mapped to a graphics processing unit (GPU) instead of a central processing unit (CPU). The DCT can be implemented using a...
US-7,609,649 Methods and apparatus for improving network based virtualization performance
Embodiments of the invention support improvements in network performance in networks such as storage area networks. This is particularly important in networks...
US-7,606,775 Mobile communication terminal using MOBP learning
A scheduling apparatus and method of an intelligent mobile communication terminal are provided. The scheduling apparatus of the mobile communication terminal may...
US-RE40,942 Integrated digital signal processor/general purpose CPU with shared internal memory
An integrated data processing platform for processing a digital signal that includes a general purpose processor and a digital signal processor (DSP) module. The...
US-7,603,550 Computer system including a secure execution mode-capable CPU and a security services processor connected via a...
A computer system includes a processor which may initialize a secure execution mode by executing a security initialization instruction. Further, the processor...
US-7,603,463 Method and apparatus for allocating processing capacity of system processing units in an extranet gateway
The expected processing bandwidth of System Processing Units (SPUs) in an extranet gateway is first assessed, for example by multiplying a CPU processor speed by...
US-7,602,779 Microprocessor, network system and communication method
A first object of the present invention is to reduce interrupt to a CPU which occurs when microprocessors that are connected by a network receive a packet from...
US-7,596,709 CPU power management based on utilization with lowest performance mode at the mid-utilization range
A demand-based method and system of a processor power management is described. A processor is caused to enter a particular performance mode based on a first and...
US-7,596,638 Method, system, and apparatus to decrease CPU temperature through I/O bus throttling
A method, apparatus, and system are disclosed. In one embodiment the method detects a temperature event in a processor and then modifies the bus frequency of an...
US-7,595,804 Systems and methods for displaying individual processor usage in a multiprocessor system
A display of CPU utilization in a multiprocessor system is provided. This feature illustrates processor utilization and application group assignments to CPUs and...
US-7,590,755 Method to offload a network stack
A method to offload a network stack connection is presented. A request, which includes a list of resource requirements from each software layer in the stack, to...
US-7,587,223 Terminal for mobile phone and method for controlling the synchronism of terminal for mobile phone
In a mobile phone terminal, in which a sound, such as the audio, may be synchronized with a moving picture even in case a sound processor unit processing the...
US-7,584,464 Software processing method and software processing system
In a multi-processor system constituted by a processor such as a CPU and a DSP, in which the processor and the DSP have an external memory and a bus as shared...
US-7,577,822 Parallel task operation in processor and reconfigurable coprocessor configured based on information in link...
A reconfigurable processor (VPU) is designed for a technical environment having a standard processor (CPU) which has, for example, a DSP, RISC, CISC processor or...
US-7,577,795 Disowning cache entries on aging out of the entry
Portions of data in a processor system are stored in a slower main memory and are transferred to a faster memory comprising a hierarchy of cache structures...
US-7,577,667 Programmable streaming data processor for database appliance having multiple processing unit groups
A data processing system having two or more groups of data processors that have attributes that are optimized for their assigned functions. A first group...
US-7,574,326 Signal processor, method of signal processing and computer program
A CPU generates the reference value (root mean squared value) of sound level and outputs it to a DSP, the DSP generates a measured value of sound level (root...
US-7,571,342 Processor system, instruction sequence optimization device, and instruction sequence optimization program
To reduce power consumption of a processor system including a plurality of processors without degradation of the processing ability, a flag detecting section...
US-7,571,258 Method and apparatus for a pipeline architecture
A method for efficiently processing layers of a data packet is provided. The method initiates with defining a pipeline of processors communicating with a...
US-7,567,295 Video system and processor for computer
A new video system and processor for computer is disclosed. In accordance to the present video processor that is capable of receiving TV signals and driving...
US-7,564,857 Router having a single CPU MAC
A router comprises a processor, a single media access controller connected to the processor; and a switch comprising a plurality of ports, wherein one of the...
US-7,555,566 Massively parallel supercomputer
A novel massively parallel supercomputer of hundreds of teraOPS-scale includes node architectures based upon System-On-a-Chip technology, i.e., each processing...
US-7,555,143 Real-time geo-registration of imagery using COTS graphics processors
A method of performing real-time geo-registration of high-resolution digital imagery using existing graphics processing units (GPUs) already found in current...
US-7,552,343 Conditional access control
The invention relates to a secure data processing system including an unscrambling module [DSC] disposed on a dedicated hardware part [HW] of an integrated...
US-7,545,828 Efficient AAL5-based mechanism for handling voice ATM cells to significantly reduce CPU load
A mechanism for implementing a single-interrupt-based voice playout buffer transfer operation. The contents of each respective channel of a multi-channel voice...
US-7,545,381 Interruptible GPU and method for context saving and restoring
A graphics processing unit ("GPU") is configured to receive an interrupt command from a CPU or internal interrupt event while the GPU is processing a first...
US-7,543,101 System of accessing data in a graphics system and method thereof
A central processor unit (CPU) is connected to a system/graphics controller generally comprising a monolithic semiconductor device. The system/graphics...
US-7,539,897 Fault tolerant system and controller, access control method, and control program used in the fault tolerant system
The present invention has been made to realize access processing performed in accordance with synchronous/asynchronous state between processors in a fault...
US-7,536,721 Low cost secure ID card and system
The invention provides a method for controlling the operating state of a lock characterized by a locked state and an unlocked state. The method comprises:...
US-7,533,196 Semiconductor integrated circuit device
A semiconductor integrated circuit device includes a plurality of internal memories, a main processor, which constitutes a first processing unit having a codec...
US-7,532,881 Apparatus and method for limiting communication range of fixed wireless terminal
Disclosed are an apparatus and a method for limiting a communication range of a fixed wireless terminal. The method comprises the steps of generating and...
US-7,529,261 Data communications method selection by data communication system
A data communications system for a computer system conducting network communications, wherein a communications method is selected and set for conducting the...
US-7,526,577 Multiple offload of network state objects with support for failover events
The present invention provides mechanisms for transferring processor control of multiple network connections between two component devices of a computerized...
US-7,523,346 Systems and methods for CPU repair
Systems and methods for repairing a processor are provided. In one embodiment, a method for repairing a processor is provided that includes, for example, the...
US-7,516,302 Efficient use of co-processor in platform independent instruction machine by controlling result transfer and...
A data processing method for processing a sequence of platform independent instructions on a data processing apparatus comprising a CPU and at least one further...
US-7,515,415 Embedded microchannel cooling package for a central processor unit
An indirect cooling liquid embedded package design for use with a computer central processor unit is suitable for thermal management of high heat dissipation...
US-7,509,646 Method of managing workloads in a distributed processing system
An embodiment of the present invention is a method for generating a simulated processor load on a system of CPU's, and introducing a controlled workload into the...
US-7,506,206 Mechanism for providing program breakpoints in a microcontroller with flash program memory
A microcontroller is disclosed. The microcontroller includes a central processor unit (CPU) and a Flash program memory in communication with the CPU via an...
US-7,506,186 Optical disc apparatus and disc apparatus
When the USB power supply (VBUS) of the USB interface is used as the power supply for driving a conventional optical disc apparatus or disc apparatus, the...
US-7,500,112 Cryptographic device and methods for defeating physical analysis
The present invention relates to a data-processing device, particularly a chip card or smart card, and to a method of operating said device, with an integrated...
US-7,496,776 Power throttling method and apparatus
Disclosed is an apparatus which deactivates both the AC as well as the DC component of power for various functions in a CPU. The CPU partitions dataflow...
US-7,493,440 Media access controller with power-save mode
There is provided a media access controller with a power-save mode. Particularly, the media access controller of the present invention minimizes power loss by...
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