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Searching: cpu processor





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Patent # Description
US-7,062,578 Flexible processing hardware architecture
A flexible, reconfigurable processing system architecture allows for the implementation of a variety of processing system configurations to be implemented on a...
US-7,058,477 Thermostat system with remote data averaging
A thermostat system according to the invention includes: a central control device (typically a programmable thermostat with a processor having: a CPU, real time...
US-7,058,286 Information input apparatus
An information processing apparatus capable of receiving and processing a variety of types of input is shown with features that make it easy to add properly...
US-7,051,242 Method and apparatus for improving yield by decommissioning optional units on a CPU due to manufacturing defects
A computer processor integrated circuit has multiple functional units, where each unit is coupled to a register file for reading and writing operands. An...
US-7,051,139 CPU expandability bus
Embodiments of the present invention provide a computer system with a high speed, high bandwidth expandability bus for integrated and non-integrated CPU...
US-7,050,430 Gigabit switch with fast filtering processor
A network switch for network communications includes at least one data port interface supporting a plurality of data ports transmitting and receiving data. A CPU...
US-7,039,817 Method and apparatus for supplying power to a processor at a controlled voltage
Apparatus forming a computer system or such-like is disclosed that includes a central processing unit (CPU) and a power supply unit. The CPU provides a digital...
US-7,039,739 Method and apparatus for providing seamless hooking and intercepting of selected kernel and HAL exported entry...
In a computer system having at least one host processor, a method and apparatus for providing seamless hooking and interception of selected entrypoints includes...
US-7,028,148 Program executing device and method for executing programs
A program executing device that can execute two programs produced using the same source program is disclosed. The program executing device 1 is generally...
US-7,028,141 High-speed distributed data processing system and method
The invention is aimed at providing a high-speed processor system capable of performing distributed concurrent processing without requiring modification of...
US-7,023,868 Voice gateway with downstream voice synchronization
A network gateway is configured to facilitate on line and off line bi-directional communication between a number of near end data and telephony devices with far...
US-7,023,445 CPU and graphics unit with shared cache
A method and mechanism for managing graphics data. A graphics unit is coupled to share a cache and a memory with a processor. The graphics unit is configured to...
US-RE39,058 Preventing processor domination during background data transfer in multipoint conferencing
Preventing processor domination of a CPU by background transfers of teleconference object data during an electronic conference is accomplished by monitoring an...
US-7,020,137 Network switching architecture with fast filtering processor
A network switch for network communications includes a first data port interface supporting a plurality of data ports transmitting and receiving data at a first...
US-7,019,689 Skipping z-counts and accurate time in GPS receivers
A navigation-satellite receiver comprises high-sensitivity radio frequency front-end and navigation processor associated with a client CPU. The client CPU runs...
US-7,016,412 System and method for dynamic adaptive decoding of scalable video to balance CPU load
There is disclosed an apparatus for controlling the processing load of a scalable video decoder that decodes an incoming scalable video bit stream and generates...
US-7,016,065 Image processing method and apparatus with multiple coding units
The invention relates to an image processing apparatus which has a coding function of image data and inputs and outputs an image and a method for such an...
US-7,013,400 Method for managing power in a simultaneous multithread processor by loading instructions into pipeline circuit...
A register in the control unit of the CPU that is used to keep track of the address of the current or next instruction is called a program counter. In an SMT...
US-7,013,398 Data processor architecture employing segregated data, program and control buses
A mobile station includes an RF transceiver and a user interface. The mobile station further includes a plurality of data processor cores each having a first...
US-7,009,401 Battery apparatus and method for monitoring battery state of a secondary battery
Motor generator (MG) is controlled via motor controller by MG control processor of CPU, so that voltage and current of battery is detected while changing...
US-7,007,192 Information processing system, and method and program for controlling the same
An information processing system capable of dynamic CPU replacement regardless of the function of OS, and a method and a program for controlling the same. The...
US-7,003,763 Data processor
A data processor having a debugging aid function capable of monitoring a plurality of kinds of internal buses from the outside and identifying each of the buses...
US-7,003,648 Flexible demand-based resource allocation for multiple requestors in a simultaneous multi-threaded CPU
A multi-threaded processor provides for efficient flow-control from a pool of un-executed stores in an instruction queue to a store queue. The processor also...
US-7,003,024 Semiconductor device
A semiconductor device comprises a DSP (Digital Signal Processor), a CPU for controlling the DSP and an interface circuit. The interface circuit comprises an...
US-7,000,140 Data processor and data processing system
This data processor can satisfy both requests of a fast transition from a low power consumption state to an operating state and low power consumption, and a data...
US-6,999,129 Image processing apparatus, method, and recording medium for controlling image quality
Viewing of a program at optimum image quality is realized. A correspondence table of combinations of MPEG video encoding parameters and image signal processing...
US-6,996,812 Software implementation of synchronous memory barriers
Selectively emulating sequential consistency in software improves efficiency in a multiprocessing computing environment. A writing CPU uses a high priority...
US-6,993,654 Secure encryption processor with tamper protection
An encryption processor for encrypting and decrypting data that ensures data security by preventing illegal deciphering or leakage of the data. The encryption...
US-6,993,466 Specifying portions of a graphical program for respective execution by a processor and a programmable hardware...
A computer-implemented system and method for generating a hardware implementation of graphical code. The method comprises first creating a graphical program. A...
US-6,990,665 Method and system for real time scheduler
Methods and computer-executable components for real-time scheduling of CPU resources are disclosed. A performance counter determines when to allocate CPU...
US-6,988,211 System and method for selecting a frequency and voltage combination from a table using a selection field and a...
A selectable control over multiple clock frequency/voltage level combinations that can be activated in a processor. A table can be placed in hardware that...
US-6,985,492 Voice gateway with voice synchronization
A network gateway is configured to facilitate on line and off line bi-directional communication between a number of near end data and telephony devices with far...
US-6,985,189 Multimedia terminal equipment and digital processing method
The invention provides a multimedia terminal equipment which can reproduce and output an object broadcasting program irrespective of a providing medium and so...
US-6,981,134 Method and system for processing using a CPU and digital signal processor
A processor processing method suitable for a processor system. The processor system comprises a CPU 10, a ROM 20 coupled to the CPU, and a DSP 30 having a memory...
US-6,977,901 Packet transmission/reception processor
If a packet processing controller at a consumer node has failed to process a received packet within a predetermined amount of time, a packet processing control...
US-6,977,670 Method and apparatus for selective registration of endoscopes with database
An electronic endoscope system includes an electronic endoscope and a processor to which the electronic endoscope is connectable. The processor includes a signal...
US-6,975,509 Computing apparatus with cooling fan
Computing apparatus including a housing that defines a cavity. The computer apparatus further includes within the cavity multiple computing components, such as a...
US-6,972,799 Auto focusing apparatus selectively operable in an ordinary mode and a high speed mode
A subject image is formed on a CCD through an imaging optical system including a focusing lens. The output from the CCD is input, through an A/D converter and...
US-6,971,066 System and method for deploying a graphical program on an image acquisition device
A computer-implemented system and method for deploying a graphical program onto an image acquisition (IMAQ) device. The method may operate to configure an image...
US-6,970,206 Method for deinterlacing interlaced video by a graphics processor
A method for deinterlacing interlaced video using a graphics processor includes receiving at least one instruction for a 2D/3D engine to facilitate creation of...
US-6,968,469 System and method for preserving internal processor context when the processor is powered down and restoring...
A CPU (1) automatically preserves the CPU context in a computer memory (5) that remains powered-up when the CPU is powered down in sleep mode. By means of the...
US-6,968,400 Local memory with indicator bits to support concurrent DMA and CPU access
A digital system is provided having at least one processor with an associated multi-segment local memory circuit. Validity circuitry is operable to indicate if...
US-6,963,964 Method and apparatus for detecting pipeline address conflict using parallel compares of multiple real addresses
In a computer processor, multiple partially translated real addresses for a pipelined operation are compared with the real addresses of one or more other...
US-6,963,950 Multi-processor type storage control apparatus for performing access control through selector
A storage control apparatus is coupled to a central processing unit (CPU) and a storage unit to control input/output of data between the CPU and the storage...
US-6,959,391 Protection of the core part of computer against external manipulation
A method is proposed for protecting the central processing unit of a computer, in particular a smart card. Individual security-related registers are logically...
US-6,957,432 Real-time scheduler
Methods and computer-executable components for real-time scheduling of CPU resources are disclosed. A performance counter determines when to allocate CPU...
US-6,954,827 Cache memory capable of selecting size thereof and processor chip having the same
A multi-way set-associative cache memory is configured to operate only with those ways of the tag and data memories that operate normally, and excludes those...
US-6,954,209 Computer CPU and memory to accelerated graphics port bridge having a plurality of physical buses with a single...
A core logic chip set in a computer system provides a bridge between processor host and memory buses and a plurality of Accelerated Graphics Port (AGP) buses....
US-6,954,206 Data processor having unified memory architecture using register to optimize memory access
In order to reduce degradation of the processing performance of the data processor due to use of a part of the main memory as a display frame buffer, when an...
US-6,944,108 Method for controlling the rotation of optical disk based on disk shapes
The optical disk player of the present invention is capable of controlling rotational speed of an optical disk, on the basis of a shape of the optical disk, so...
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