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Searching: cpu processor





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Patent # Description
US-6,940,739 Semiconductor memory device
A memory structure/circuit has at least two memory cell arrays connected to each other in a hierarchy. The bit lines of the two or more memory cell arrays are...
US-6,938,145 Associative memory system with a multi-digit incrementable validity counter
A computer system includes a central processing unit, an addressable main memory storing data pages and a page table, and an associative memory. The associative...
US-6,938,112 Use of bus hold to prevent bus contention between high speed processor and slow peripheral
The present invention discloses a method and apparatus for preventing contention on a common data bus between a CPU and a peripheral device with which the CPU...
US-6,938,110 Virtual processor through USB
The invention relates to a virtual processor through USB (VPTU), which is installed in a peripheral with USB interface specifications and comprises an I/O...
US-6,937,267 Electronic endoscope
An electronic endoscope displays the date so as to enable the year, month, and day to be differentiated on a screen when displaying a date together with the...
US-6,934,389 Method and apparatus for providing bus-encrypted copy protection key to an unsecured bus
A copy protection (CP) key used by a sending source, such as a POD, to encrypt content such as audio and/or video information is derived by a first key generator...
US-6,934,217 Countermeasure threat emulator and method
A system and method is disclosed for a countermeasure threat emulator (CME) provided in a tubular housing that may be launched from a submarine or ship. The CME...
US-6,930,882 Processor shroud adaptor for multiple CPU locations
A fan, a heat generating component and a shroud are mounted in a computer chassis. The shroud includes an open first end adjacent the fan and an open second end...
US-6,928,500 High speed bus system that incorporates uni-directional point-to-point buses
A high speed bus system for use in a shared memory system that allows for the high speed transmissions of commands and data between a number of processors and a...
US-6,925,052 Multi-channel network monitoring apparatus, signal replicating device, and systems including such apparatus and...
A multi-channel network monitoring apparatus has input connectors for network signals to be monitored and four channel processors in a rack-mountable...
US-6,919,715 Methods to control the droop when powering dual mode processors and associated circuits
A DC/DC converter 100 has a DAC 40 that receives a code associated with desired processor operating voltage and sets the reference voltage on its output 41. The...
US-6,918,018 64-bit single cycle fetch scheme for megastar architecture
The 64-bit single cycle fetch method described here relates to a specific `megastar` core processor employed in a range of new digital signal processor devices....
US-6,918,002 Data processor and data processing method reduced in power consumption during memory access
When the CPU writes data into a memory, a 0 detection circuit detects the number of bits having the value 0 from the data. When the number of bits with 0 is...
US-6,915,120 Information terminal apparatus having a variable directional antenna and control method thereof
The information terminal unit comprises a transceiver and a processor, while the variable directional antenna comprises a main antenna element to which the...
US-6,912,209 Voice gateway with echo cancellation
A network gateway is configured to facilitate on line and off line bi-directional communication between a number of near end data and telephony devices with far...
US-6,904,535 Information processing device selecting normal and exclusive operational modes according to wake up...
An information device for speeding up relatively simple processing such as data reference with respect to an information device such as a personal computer, and...
US-6,901,524 Processor having real-time power conservation and thermal management
A real-time power conservation and thermal management apparatus and method for portable computers employs a monitor (40) to determine whether a CPU may rest...
US-6,898,674 Apparatus, method, and system for synchronizing information prefetch between processors and memory controllers
According to one embodiment of the invention, a prefetcher in a memory controller is described which includes logic to receive memory request hints from a CPU....
US-6,895,508 Stack memory protection
A method and system for memory page protection wherein new stack memory load/store instructions are defined for memory management. A corresponding operating...
US-6,895,497 Multidispatch CPU integrated circuit having virtualized and modular resources and adjustable dispatch priority
A multiple dispatch processor has several instruction fetch units, each for providing a stream of instructions to an instruction decode and dispatch unit. The...
US-6,895,491 Memory addressing for a virtual machine implementation on a computer processor supporting virtual...
A software monitor, interposed between the hardware layer of a computer system and one or more guest operating systems, constructs and maintains a ...
US-6,894,939 Data processor, semiconductor memory device and clock frequency detecting method
In a data processor which comprises a semiconductor memory device, a potential on a bit line of the semiconductor memory device is monitored at the end of a...
US-6,894,405 Facility for supplying spare or auxiliary power supply to processor device
A power supply facility includes a primary power circuit coupled to energize a CPU, a control circuit coupled to the CPU, and an auxiliary power circuit coupled...
US-6,892,339 Discrete multi-tone (DMT) system and method that communicates a data pump data stream between a general purpose...
The apparatus and method herein splits the function of a digital subscriber line (DSL) modem data pump between a digital signal processor (DSP 106) and a general...
US-6,891,544 Game system with graphics processor
The present invention relates to the architecture and use of a computer system optimized for the efficient modeling of graphics. The computer system has a...
US-6,891,543 Method and system for optimally sharing memory between a host processor and graphics processor
A method and system according to the present invention provide for sharing memory between applications running on one or more CPUs, and acceleration ...
US-6,889,245 Tightly-coupled disk-to-CPU storage server
A storage server for efficiently retrieving data from a plurality of disks in response to user access requests. The server comprises a plurality of processors...
US-6,886,082 Information processing system
The object of this invention is to perform the sorting, compiling and joining of data at extremely high speeds. This is achieved by a distributed memory type...
US-6,883,128 PC and ATE integrated chip test equipment
The present invention relates to a test equipment of a chip memory device. A memory pattern test is implemented using a pattern generation substrate in which a...
US-6,880,047 Local emulation of data RAM utilizing write-through cache hardware within a CPU module
In a processor module having a local software visible data memory and a write through cache connected to an external memory space external to the processor...
US-6,879,178 Measuring current on a die
Disclosed are various systems, methods, and programs embodied in computer readable mediums for measuring current in a central processor unit (CPU) package. To...
US-6,877,082 Central processing unit including address generation system and instruction fetch apparatus
A disclosed address generation system includes a decrementer and a multiplexer. The decrementer produces a decremented address signal by subtracting a first...
US-6,873,608 Communication system utilizing host signal processing
The system utilizes host signal processing techniques applicable to cellular communication system devices which are integrated with a system incorporating a...
US-6,871,102 Apparatus and method for verifying memory coherency of duplication processor
An apparatus for verifying memory coherency of a duplication processor having a symmetrical structure includes: an active processor in which a standby memory...
US-6,859,434 Data transfer scheme in a communications system incorporating multiple processing elements
A novel data transfer scheme for efficiently transferring data between multiple data generating processing units in a processing element wherein each processing...
US-6,854,039 Memory management system and method providing increased memory access security
A memory management unit (MMU) is disclosed for managing a memory storing data arranged within a multiple memory pages. The memory management unit includes a...
US-6,853,385 Video, audio and graphics decode, composite and display system
A video, audio and graphics system uses multiple transport processors to receive in-band and out-of-band MPEG Transport streams, to perform PID and section...
US-6,851,042 Audio, fax and modem capabilities with a digital signal processor of a sound card of a computer system
An optional card including a digital signal processor (DSP) for use by a modem daughter board, where the modem daughter board is equipped with a data access...
US-6,851,036 Method and apparatus for controlling external devices through address translation buffer
A data processing system and a data processor in which the control information for controlling an external device, especially, a device having a PCMCIA interface...
US-6,848,046 SMM loader and execution mechanism for component software for multiple architectures
A method and system that enables executable content in the form of one or more software drivers or firmware volumes to be loaded into the System Management Mode...
US-6,848,015 Arbitration technique based on processor task priority
A computer system including multiple CPUs inform other logic in a computer system as to the priority level (e.g., task priority) associated with the CPU or...
US-6,847,882 Misfire detection system and method of median filtering
A processor having an embedded median filter routine, a method of median filtering using a vehicle's CPU, and a misfire detection system for an internal...
US-6,845,456 CPU utilization measurement techniques for use in power management
A computer system that has multiple performance states periodically obtains utilization information for a plurality of tasks operating on the processor and...
US-6,840,454 Data transmission method and card therefor
A portable article of the smart card type and a method of transmitting data to such an article. The article comprises an article body and an integrated circuit...
US-6,839,835 Method of loading initial program in processor system
In a processor system having a CPU, a RAM, and a communication portion for external communication, the operation of the central processing unit is stopped when...
US-6,836,848 Power management integrated circuit for overriding an internal frequency ID code of a processor and for...
An integrated circuit includes voltage identification (VID) logic and frequency identification logic (FID) for a CPU, as well as power good circuitry for...
US-6,836,838 Architecture for a processor complex of an arrayed pipelined processing engine
A processor complex architecture facilitates accurate passing of transient data among processor complex stages of a pipelined processing engine. The processor...
US-6,834,359 Method and system for testing a processor
A method for verifying the correctness of the functional behavior of a processor cooperating with software is provided. Furthermore, the method allows...
US-6,829,713 CPU power management based on utilization with lowest performance mode at the mid-utilization range
A demand-based method and system of central processing unit power management. The utilization of a central processing unit (CPU) during a sampling time interval...
US-6,829,303 Methods and apparatus for decoding images using dedicated hardware circuitry and a programmable processor
Video decoder methods and apparatus are described. In accordance with the invention, hardware decoder circuitry, e.g., intra-coded image decoding circuitry and...
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