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Searching: cpu processor





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Patent # Description
US-6,128,702 Integrated processor/memory device with victim data cache
An integrated processor/memory device comprising a main memory, a CPU, a victim cache, and a primary cache. The main memory comprises main memory banks. The...
US-6,124,865 Duplicate cache tag store for computer graphics system
A duplicate cache tag store, accessible to a graphics processor and to devices connected to the I/O bus without creating traffic on the system bus. Any entry...
US-6,122,716 System and method for authenticating a computer memory
A computer system for high-performance video and audio manipulations comprising a locked memory cartridge and an audio/video/compact disk (CD) drive...
US-6,122,713 Dual port shared memory system including semaphores for high priority and low priority requestors
A system and method for controlling access to a dual port shared memory in a system comprising a host computer system and a communication device comprised in or...
US-6,122,699 Data processing apparatus with bus intervention means for controlling interconnection of plural busses
This invention has as its object to improve the net processing speed by appropriately assigning the DMA processing time for attaining high-speed processing using...
US-6,122,696 CPU-peripheral bus interface using byte enable signaling to control byte lane steering
A CPU-Peripheral bus interface for 64-bit local bus to 32-bit peripheral bus uses byte enable signaling to provide byte lane steering. Qbuffer logic provides a...
US-6,119,219 System serialization with early release of individual processor
A pipelined multiprocessor system for ESA/390 operations which executes a simple instruction set in a hardware controlled execution unit and executes a complex...
US-6,115,791 Hierarchical cache system flushing scheme based on monitoring and decoding processor bus cycles for flush/clear...
An apparatus for monitoring and decoding processor bus cycles and flushing a second level cache upon decoding a special flush acknowledge cycle. The CPU...
US-6,115,757 DMA control apparatus for multi-byte serial-bit transfer in a predetermined byte pattern and between memories...
A DMA control apparatus transfers a data set of bytes, with no intermixing these data bytes and with favorable efficiency. A DMA controller receives data bytes...
US-6,115,036 Video game/videographics program editing apparatus with program halt and data transfer features
A videographics/video game fabricating system includes a multiprocessor based game processor console which includes a main central processing unit (CPU) which...
US-6,112,303 Computer system with system ROM including serial-access PROM coupled to an auto-configuring memory controller...
A computer system having a processor is provided with a memory controller serially coupled to a serial-access programmable ROM (PROM) through the serial PROM...
US-6,112,290 Communication system signal processing apparatus with ROM stored signal procedures executed RAM
A signal processing apparatus is disclosed which includes a low speed ROM (9) for storing a plurality of signal procedures, a high speed RAM (4) used by a...
US-6,112,287 Shared memory multiprocessor system using a set of serial links as processors-memory switch
A multiprocessor system comprising a core memory (RAM), processing units (CPU.sub.1 -CPU.sub.j), each being provided with a cache memory (MCj), a directory...
US-6,108,792 Article for providing continuity of operation in a computer
An apparatus for providing continuity of operation in system which performs a process having CPU, input/output, main memory and power supply by restoring the...
US-6,108,204 CPU heat sink
A cooling system for a multi processor system mounted in a rack that has a top, a bottom, sides and a plurality of card cages. Each of the card cages has card...
US-6,105,145 System and method for generating high resolution clockticks in a computer system
A system and method is provided by the present invention for transmitting or receiving data to or from a computer system by reprogramming the computer system's...
US-6,104,417 Unified memory computer architecture with dynamic graphics memory allocation
A computer system provides dynamic memory allocation for graphics. The computer system includes a memory controller, a unified system memory, and memory clients...
US-6,104,251 Method and apparatus for providing transient suppression in a central processor unit (CPU) phase locked loop...
The present invention is directed to apparatus and methods for reducing transient signals in phase locked loop (PLL) circuits of central processing units. One...
US-6,101,610 Computer system having thermal sensing with dual voltage sources for sensor stabilization
A computer system employs a thermal sensor in the main CPU housing to detect operating temperature. If a preselected trip point is reached indicating that...
US-6,101,599 System for context switching between processing elements in a pipeline of processing elements
A system and technique facilitate fast context switching among processor complex stages of a pipelined processing engine. Each processor complex comprises a...
US-6,097,955 Apparatus and method for optimizing CPU usage in processing paging messages within a cellular communications system
An application processor within a distributed network of a cellular communications system minimizes CPU resource consumption for processing paging messages by...
US-6,097,356 Methods of improving display uniformity of thin CRT displays by calibrating individual cathode
Methods of improving the display uniformity of a thin CRT display are disclosed. These methods can provide nearly perfect display uniformity for a thin CRT...
US-6,094,699 Apparatus and method for coupling devices to a PCI-to-PCI bridge in an intelligent I/O controller
The present invention pertains to an apparatus and method for transparently coupling PCI devices behind a PCI-to-PCI bridge. A controller is coupled to a primary...
US-6,094,203 Architecture for a graphics processing unit using main memory
A CPU and a CPU cache memory unit is coupled to a system memory bus. A graphics processor with a graphics cache memory unit is also coupled to the system memory...
US-6,092,119 Random access audio/video processor with compressed video resampling to allow higher bandwidth throughput
A random access audio/video processor having multiple outputs is disclosed. The processor includes a main control unit with analog video and audio back panels,...
US-6,088,743 Processor receiving response request corresponding to access clock signal with buffer for external transfer...
A memory 1 performs its internal operation in response to access requests (200, 201 and 202) of a CPU 2 in synchronism with the oscillated output of a...
US-6,088,701 Command data transport to a graphics processing device from a CPU performing write reordering operations
A system and method for enabling a graphics processor to operate with a CPU that reorders write instructions without requiring expensive hardware and which does...
US-6,085,333 Method and apparatus for synchronization of code in redundant controllers in a swappable environment
Methods and associated apparatus for automatically synchronizing the operating code between a plurality of controllers. In a first embodiment after the spare...
US-6,085,332 Reset design for redundant raid controllers
A reset circuit implemented in a RAID controller configured for dual active operation. The reset circuit generates a reset pulse with a relatively invariant...
US-6,085,314 Central processing unit including APX and DSP cores and including selectable APX and DSP execution modes
A CPU or microprocessor which includes a general purpose CPU component, such as an X86 core, and also includes a DSP core. In a first embodiment, the CPU...
US-6,085,273 Multi-processor computer system having memory space accessible to multiple processors
A multi-processor computer system comprises one or more CPUs (1) connected to a host computer (2) via a common PCI bus system backplane (3). The host computer...
US-6,081,868 System and methods for performing cache latency diagnostics in scalable parallel processing architectures...
An integrated diagnostics system within a processing system for monitoring and identifying performance problems within the processing system. The processing...
US-6,079,013 Multiprocessor serialization with early release of processors
A pipelined multiprocessor system for ESA/390 operations which executes a simple instruction set in a hardware controlled execution unit and executes a complex...
US-6,076,158 Branch prediction in high-performance processor
A CPU of the RISC type employs a standardized, fixed instruction size, and permits only simplified memory access data width and addressing modes limited to...
US-6,076,139 Multimedia computer architecture with multi-channel concurrent memory access
A computer system providing multiple processors or masters an architecture for highly concurrent processing and data throughput. A multiple channel memory...
US-6,073,251 Fault-tolerant computer system with online recovery and reintegration of redundant components
A computer system in a fault-tolerant configuration employs multiple identical CPUs executing the same instruction stream, with multiple, identical memory...
US-6,070,212 Bus arbiter operable as a DRAM controller
A bus arbiter capable of avoiding needless increase in circuit scale is provided. The bus arbiter controls a bus shared by a CPU (central processing unit) and a...
US-6,069,793 Circuit module and information processing apparatus
The present invention provides an information processing apparatus that may be designed in small and thin size and a small and thin CPU module that has a nigh...
US-6,065,096 Integrated single chip dual mode raid controller
A RAID controller integrated into a single chip. The RAID controller chip includes a general purpose RISC processor, memory interface logic, a host CPU PCI bus,...
US-6,063,030 PC based ultrasound device with virtual control user interface
The PC based ultrasound system utilizes a standard PC central processing unit or CPU (an Intel 486 processor or better), standard PC memory storage and retrieval...
US-6,061,521 Computer having multimedia operations executable as two distinct sets of operations within a single instruction...
A multimedia extension unit (MEU) is provided for performing various multimedia-type operations. The MEU may be coupled either through a coprocessor bus or a...
US-6,061,449 Secure processor with external memory using block chaining and block re-ordering
A scrambled data transmission is descrambled by communicating encrypted program information and authentication information between an external storage device and...
US-6,061,235 Method and apparatus for a modular integrated apparatus for heat dissipation, processor integration, electrical...
A modular integrated apparatus and method that integrates mechanical, electrical, and thermal management, and that includes a computer processor (CPU), or VLSI...
US-6,055,373 Computer system including a digital signal processor and conventional central processing unit having equal and...
A digital processing system including a central processing unit (CPU) and a digital signal processor (DSP) is optimized for digital signal processing ...
US-6,052,791 Control method for a hard disk drive and a data processor reducing power consumption of the hard disk drive
When it is recognized by the CPU that the user uses the system, and the provability of the HDD-access is high. Based on this judges, the HDD timer register is...
US-6,047,372 Apparatus for routing one operand to an arithmetic logic unit from a fixed register slot and another operand...
A multimedia extension unit (MEU) is provided for performing various multimedia-type operations. The MEU can be coupled either through a coprocessor bus or a...
US-6,047,351 Jitter free instruction execution
A microcontroller including a streamlined pipeline processor provides a predictable time period for executing a set of instructions including branch...
US-6,046,760 Set top board for video on demand service and a computer system mounting the same
A set top board which is mounted within a personal computer in the form of a card, such as a video card and a communications card, includes: a networking part...
US-6,044,430 Real time interrupt handling for superscalar processors
A CPU includes a real time interrupt (RTI) control unit configured to control real time interrupt capabilities of the CPU. Upon receipt of a real time interrupt...
US-6,041,379 Processor interface for a distributed memory addressing system
A processor interface for interfacing a CPU with a global memory and with other CPUs uses a node control bus for transmitting task and addressing information,...
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