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Searching: cpu processor





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Patent # Description
US-6,085,314 Central processing unit including APX and DSP cores and including selectable APX and DSP execution modes
A CPU or microprocessor which includes a general purpose CPU component, such as an X86 core, and also includes a DSP core. In a first embodiment, the CPU...
US-6,085,273 Multi-processor computer system having memory space accessible to multiple processors
A multi-processor computer system comprises one or more CPUs (1) connected to a host computer (2) via a common PCI bus system backplane (3). The host computer...
US-6,081,868 System and methods for performing cache latency diagnostics in scalable parallel processing architectures...
An integrated diagnostics system within a processing system for monitoring and identifying performance problems within the processing system. The processing...
US-6,079,013 Multiprocessor serialization with early release of processors
A pipelined multiprocessor system for ESA/390 operations which executes a simple instruction set in a hardware controlled execution unit and executes a complex...
US-6,076,158 Branch prediction in high-performance processor
A CPU of the RISC type employs a standardized, fixed instruction size, and permits only simplified memory access data width and addressing modes limited to...
US-6,076,139 Multimedia computer architecture with multi-channel concurrent memory access
A computer system providing multiple processors or masters an architecture for highly concurrent processing and data throughput. A multiple channel memory...
US-6,073,251 Fault-tolerant computer system with online recovery and reintegration of redundant components
A computer system in a fault-tolerant configuration employs multiple identical CPUs executing the same instruction stream, with multiple, identical memory...
US-6,070,212 Bus arbiter operable as a DRAM controller
A bus arbiter capable of avoiding needless increase in circuit scale is provided. The bus arbiter controls a bus shared by a CPU (central processing unit) and a...
US-6,069,793 Circuit module and information processing apparatus
The present invention provides an information processing apparatus that may be designed in small and thin size and a small and thin CPU module that has a nigh...
US-6,065,096 Integrated single chip dual mode raid controller
A RAID controller integrated into a single chip. The RAID controller chip includes a general purpose RISC processor, memory interface logic, a host CPU PCI bus,...
US-6,063,030 PC based ultrasound device with virtual control user interface
The PC based ultrasound system utilizes a standard PC central processing unit or CPU (an Intel 486 processor or better), standard PC memory storage and retrieval...
US-6,061,521 Computer having multimedia operations executable as two distinct sets of operations within a single instruction...
A multimedia extension unit (MEU) is provided for performing various multimedia-type operations. The MEU may be coupled either through a coprocessor bus or a...
US-6,061,449 Secure processor with external memory using block chaining and block re-ordering
A scrambled data transmission is descrambled by communicating encrypted program information and authentication information between an external storage device and...
US-6,061,235 Method and apparatus for a modular integrated apparatus for heat dissipation, processor integration, electrical...
A modular integrated apparatus and method that integrates mechanical, electrical, and thermal management, and that includes a computer processor (CPU), or VLSI...
US-6,055,373 Computer system including a digital signal processor and conventional central processing unit having equal and...
A digital processing system including a central processing unit (CPU) and a digital signal processor (DSP) is optimized for digital signal processing ...
US-6,052,791 Control method for a hard disk drive and a data processor reducing power consumption of the hard disk drive
When it is recognized by the CPU that the user uses the system, and the provability of the HDD-access is high. Based on this judges, the HDD timer register is...
US-6,047,372 Apparatus for routing one operand to an arithmetic logic unit from a fixed register slot and another operand...
A multimedia extension unit (MEU) is provided for performing various multimedia-type operations. The MEU can be coupled either through a coprocessor bus or a...
US-6,047,351 Jitter free instruction execution
A microcontroller including a streamlined pipeline processor provides a predictable time period for executing a set of instructions including branch...
US-6,046,760 Set top board for video on demand service and a computer system mounting the same
A set top board which is mounted within a personal computer in the form of a card, such as a video card and a communications card, includes: a networking part...
US-6,044,430 Real time interrupt handling for superscalar processors
A CPU includes a real time interrupt (RTI) control unit configured to control real time interrupt capabilities of the CPU. Upon receipt of a real time interrupt...
US-6,041,379 Processor interface for a distributed memory addressing system
A processor interface for interfacing a CPU with a global memory and with other CPUs uses a node control bus for transmitting task and addressing information,...
US-6,038,689 Fault notification system and process using local area network
A fault notification system detects the non-operational state of the computer, or other type of network device, and transmits network messages from the device to...
US-6,035,347 Secure store implementation on common platform storage subsystem (CPSS) by storing write data in non-volatile...
A data storage system and method for securely storing data includes (a) a host CPU; (b) a non-volatile storage (NVS) memory for storing data; (c) a processor,...
US-6,032,265 Fault-tolerant computer system
A fault-tolerant computer system, which prevents an I/O fault from reaching the CPU block while using an alternative I/O block to continue processing, employs...
US-6,032,247 Central processing unit including APX and DSP cores which receives and processes APX and DSP instructions
A CPU or microprocessor which includes a general purpose CPU component, such as an X86 core, and also includes a DSP core. In a first embodiment, the CPU...
US-6,030,289 Video game apparatus, method of displaying models in video game apparatus, and computer-readable recording...
An inverted polygon data memory stores inverted polygon data generated in advance, among models to be considered for reflection on a water surface, of those...
US-6,029,242 Data processing system using a shared register bank and a plurality of processors
A system and method is provided for use in register-based CPUs for simultaneously processing data in a series of CPU register banks while concurrently loading...
US-6,029,241 Processor architecture scheme having multiple bank address override sources for supplying address values and...
A processor architecture scheme which allows for encoding multiple addressing modes and which has multiple sources for generating a bank address value. The...
US-6,028,529 Clock correction function for a radio selective call receiver with an intermittent receiver
A radio selective call receiver includes a time-of-day clock, a radio system, a control processor including a decoder, and a CPU which controls the operations...
US-6,026,478 Split embedded DRAM processor
A processing architecture includes a first CPU core portion coupled to a second embedded dynamic random access memory (DRAM) portion. These architectural...
US-6,025,989 Modular node assembly for rack mounted multiprocessor computer
A modular node assembly for a rack mounted multiprocessor computer in which the node assembly has a logic chassis and a removable chassis. The logic chassis...
US-6,023,776 Central processing unit having a register which store values to vary wait cycles
A CPU (central processing unit) including an instruction processor and a data processor is connected with a ROM (read only memory) bus, a RAM (random access...
US-6,021,456 Method for communicating interrupt data structure in a multi-processor computer system
A multiprocessor having improved bus efficiency is shown to include a number of processing units and a memory coupled to a system bus. Also coupled to the system...
US-6,018,712 Method and apparatus for remote program execution to use in computer software protection without the use of...
A storage device, either a Cartridge (40) or a credit-card-like, capable of protecting the program stored inside it by physical measures and a ...
US-6,012,138 Dynamically variable length CPU pipeline for efficiently executing two instruction sets
A processor for a data-processing system is provided with a dynamically reconfigurable multistage pipeline which permits the execution of more than one...
US-6,012,137 Special purpose processor for digital audio/video decoding
A special purpose reduced instruction set central processing unit (RISC CPU) for controlling digital audio/video decoding. The instruction set includes flow...
US-6,009,505 System and method for routing one operand to arithmetic logic units from fixed register slots and another...
A multimedia extension unit (MEU) is provided for performing various multimedia-type operations. The MEU can be coupled either through a coprocessor bus or a...
US-6,009,087 Mobile communication system using various multiple access methods
A mobile communication system in which various access methods may be selected according to the user's priority. In the mobile communication system, each of a...
US-6,008,879 Photograph processor
Presence or absence of paper is detected by individual sensors and data content stored in a backup RAM is checked out at the time when an external power source...
US-6,008,446 Synthesizer system utilizing mass storage devices for real time, low latency access of musical instrument...
A synthesizer system includes a CPU and host memory operating a software routine. The software routine stores a first part of each waveform signal in a sample...
US-6,006,319 Coprocessor system for accessing shared memory during unused portion of main processor's instruction cycle...
A coprocessor system is disclosed in which a CPU in a game machine body and a CPU in a game cartridge are formed by CPU cores having the same architecture and...
US-6,006,309 Information block transfer management in a multiprocessor computer system employing private caches for...
A computer system including a group of CPUs, each having a private cache which communicates with its CPU to receive requests for information blocks and for...
US-6,005,849 Full-duplex communication processor which can be used for fibre channel frames
A full duplex communication processor simultaneously sends and receives frames of data and commands. Separate transmit and receive protocol engines are...
US-6,005,546 Hardware assist for YUV data format conversion to software MPEG decoder
A display controller assists a host processor in decoding MPEG data. The display controller receives YUV data in non-pixel video format from a host CPU and...
US-6,003,144 Error detection and correction
A computer system having a CPU, a disk array system accessible by the CPU, and a disk array controller that includes error detection and connection logic. The...
US-5,999,963 Move-to-rear list scheduling
A new scheduling method and policy for shared (server) resources, such as the CPU or disk memory of a multiprogrammed data processor. The scheduling is referred...
US-5,996,004 Concurrent programming apparatus and method for electronic devices
A computer controlled group of programmer sites are provided to burn in or enter operating code into various types of programmable electronic devices, such as...
US-5,995,914 Method and apparatus for asynchronously measuring frequency shifted signals
A method and apparatus for fast response and distortion measurement of a signal transfer device. A computer processor generates a multitone test signal of...
US-5,995,746 Byte-compare operation for high-performance processor
A high-performance CPU of the RISC (reduced instruction set) type employs a standardized, fixed instruction size, and permits only simplified memory access data...
US-5,995,161 Digital video processor with subvideo processor
An improved architecture for a digital video processor that processes subvideo data to be superimposed on a main video image during a display image scanning...
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