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Searching: cpu processor





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Patent # Description
US-5,898,894 CPU reads data from slow bus if I/O devices connected to fast bus do not acknowledge to a read request after a...
A computer architecture that includes a high speed, low pin bus that directly couples a microprocessor to the physical memory of the processor. Physical memory...
US-5,898,829 Fault-tolerant computer system capable of preventing acquisition of an input/output information path by a...
In a computer system comprising first through N-th processors which are provided with first through N-th processor input/output information transmission paths,...
US-5,896,521 Processor synthesis system and processor synthesis method
The present invention provides a processor synthesis system and a processor synthesis method which enable a designer to synthesize a CPU that does not depend on...
US-5,895,492 Processor associated blocking symbol controls for serializing the accessing of data resources in a computer system
Provides a processor CLE (CPU lock element) for each processor in a protected storage in a multi-processor computer system. Each CLE contains a blocking symbol...
US-5,893,154 CPU write-back cache coherency mechanism that transeers data from a cache memory to a main memory before access...
A writeback cache coherency control module that can allow systems that do not support cache, or support only writethrough cache, to operate with a processor that...
US-5,893,153 Method and apparatus for preventing a race condition and maintaining cache coherency in a processor with...
An integrated processor includes an on-chip integrated input/output (IO) system (which does not have a on-chip bus) to handle direct memory access (DMA)...
US-5,893,145 System and method for routing operands within partitions of a source register to partitions within a...
A multimedia extension unit (MEU) is provided for performing various multimedia-type operations. The MEU can be coupled either through a coprocessor bus or a...
US-5,892,980 System for dynamically changing the length of transmit and receive sample buffers utilizing previous responding...
An apparatus for and method of implementing a novel buffer based fall duplex communication system is disclosed. The disclosed invention is particularly useful in...
US-5,892,974 System for sub-data processor identifies the peripheral from supplied identification data and supplies data...
A data processing apparatus achieves high-speed image control, image control responding rapidly to the content of the operation of a peripheral, avoidance of...
US-5,890,220 Address conversion apparatus accessible to both I/O devices and processor and having a reduced number of index...
In a computer system having an address converter for DMA (direct memory access), an address conversion apparatus in which a memory area to be accessed by the DMA...
US-5,890,003 Interrupts between asynchronously operating CPUs in fault tolerant computer system
A computer system in a fault-tolerant configuration employs three identical CPUs executing the same instruction stream, with two identical, self-checking memory...
US-5,884,100 Low-latency, high-throughput, integrated cache coherent I/O system for a single-chip processor
A single-chip central processing unit (CPU) includes a processing core and a complete cache-coherent I/O system that operates asynchronously with the processing...
US-5,884,092 System for maintaining fixed-point data alignment within a combination CPU and DSP system
In microcomputers and digital signal processors in which a central processing unit for controlling the entire system and a digital signal processing unit having...
US-5,884,091 Computer system having a central processing unit responsive to the identity of an upgrade processor
A uniprocessing computer system is provided with an original CPU and an upgrade socket for receiving an additional processor that need not be of a single...
US-5,883,327 Keyboard system for an electric musical instrument in which each key is provided with an independent output to...
A keyboard system for an electronic musical instrument includes: a keyboard having a number of keys; a keyboard central processing unit (CPU) coupled to the...
US-5,880,855 Document process apparatus including a memory storage location function
A document processing apparatus that is adapted to the state of document data to be processed and performs document processing at low cost and efficiently. When...
US-5,880,387 Digital sound processor having a slot assigner
A digital sound generating apparatus and sound generating method therefor is disclosed including a CPU interface for exchanging information with a CPU...
US-5,878,369 Golf course yardage and information system
A player position determining and course management system for a golf course having a plurality of roving units for use by players in playing the course is...
US-5,878,237 Apparatus, method and system for a comuter CPU and memory to PCI bridge having a pluarlity of physical PCI buses
A core logic chip set in a computer system provides a bridge between processor host and memory buses and a plurality of peripheral component interconnect ("PCI")...
US-5,878,217 Network controller for switching into DMA mode based on anticipated memory overflow and out of DMA mode when...
A network controller has a default non-DMA mode of data transfer that transfers received data frames to a desired location in internal memory under control of a...
US-5,872,960 Integrated circuit having CPU core operable for switching between two independent asynchronous clock sources of...
An integrated data processing system includes a shared internal bus for transferring both instructions and data. A shared bus interface unit is connected to the...
US-5,870,713 Information processor
An information processor having a scheduling function according to the present invention includes an input device, a memory for storing elementary item...
US-5,864,704 Multimedia processor using variable length instructions with opcode specification of source operand as result...
A media engine is disclosed herein which incorporates into a single chip structure the seven multimedia functions of video, 2D graphics, 3D graphics, audio,...
US-5,864,702 Computer system power management interconnection circuitry, systems and methods
A microcomputer integrated circuit (102) has a central processing unit (CPU) (702) first power management circuit (708) responsive to a system management...
US-5,862,308 Fault intercept and resolution process independent of operating system
A fault handling process in a computer system subject to CPU design errors and functioning under an operating system (OS) having an integral fault handling...
US-5,861,892 Image processing apparatus using compressed-data processing
An image processing apparatus in which image data is input, a generator generates area information and a processor processes the image data in accordance with...
US-5,860,148 Asynchronous transfer mode cell processing system with cell buffer space gathering
Methods and apparatus for processing cells in an asynchronous transfer mode (ATM) communication system. An ATM cell processor provides a cell buffer RAM (CBR)...
US-5,860,032 Autofocus device of a camera and method
An autofocus device and method for a camera that can process statistically the tracking and focusing of an object in high velocity motion. The device and method...
US-5,860,000 Floating point unit pipeline synchronized with processor pipeline
An FPU pipeline is synchronized with a CPU pipeline. Synchronization is achieved by having stalls and freezes in any one pipeline cause stalls and freezes in the...
US-5,854,641 Method and apparatus for display image rotation
A method and an apparatus for rotating images on a computer system is disclosed. The system includes a processor for accessing an image frame buffer using a set...
US-5,850,555 System and method for validating interrupts before presentation to a CPU
A programmable interrupt controller for use in computer systems including one or more CPUs is provided. The programmable interrupt controller includes an...
US-5,850,540 Method and apparatus for time-sharing CPU system bus in image generation system
Methods and apparatus for generating image data are provided. A memory and a data processor are coupled with a system bus. In certain embodiments a data...
US-5,850,058 Information processor
It is an object to provide a computer system including a practical input device which can be operated with more natural sense. The present input pen which is...
US-5,848,280 Apparatus for providing continuity of operation in a computer
An apparatus for providing continuity of operation in system which performs a process having CPU, input/output, main memory and power supply by restoring the...
US-5,848,262 Simulating digital systems by using vector processing
The inventive software device simulates the cycles of a digital device on a computer system. The inventive simulator allows model bits to be computed in parallel...
US-5,848,250 Processor upgrade system for a personal computer
A system for upgrading a personal computer includes a motherboard having upgrade sockets for upgrading the CPU and the clock oscillator without the need to...
US-5,847,303 Voice processor with adaptive configuration by parameter setting
A voice processing apparatus modulates an input voice into an output voice according to a parameter set. In the voice processing apparatus, a microphone inputs...
US-5,845,310 System and methods for performing cache latency diagnostics in scalable parallel processing architectures...
An integrated diagnostics system within a processing system for monitoring and identifying performance problems within the processing system. The processing...
US-5,845,138 CPU power management in non-APM systems
In order to save power in a computer system which lacks an APM BIOS or similar built-in power management facility, a power management V.times.D is hooked into...
US-5,845,132 Computer system power management interconnection circuitry, system and methods
A microcomputer integrated circuit (102) has a central processing unit (CPU) (702) first power management circuit (708) responsive to a system management...
US-5,845,060 High-performance fault tolerant computer system with clock length synchronization of loosely coupled processors
A fault-tolerant computer system employing multiple CPUs executing the same instruction stream under independent clock cycle timing. The CPUs deterministically...
US-5,844,574 System for enabling a CPU and an image processor to synchronously access a RAM
A synchronization system includes an image processor, a RAM, a CPU with an R/W interface, and a time controller. The time controller generates synchronization...
US-5,842,041 Computer system employing a control signal indicative of whether address is within address space of devices on...
An integrated processor is provided that employs an improved address decoding method during bus cycles of an external master. An external PCI master may initiate...
US-5,839,584 Motherboard stiffener and guide for processor modules and PCI cards
A structural foam, injection molded superstructure is attached to a motherboard by means of threaded inserts. The superstructure is formed with guide ways for...
US-5,835,788 System for transferring input/output data independently through an input/output bus interface in response to...
A programmable DMA controller that uses an instruction set dedicated to moving data efficiently over a bus, comprising a program memory, a program counter, a...
US-5,835,767 Method and apparatus for controlling available processor capacity
A method and system are disclosed for limiting the processing power of a CPU or CPUs in a multi-processing system comprising at least one constrained or hobbled...
US-5,835,554 X-ray imaging apparatus and x-ray generation detector for activating the same
An image processor comprises a CPU, a ROM for storing programs and data, a main storage memory for storing image data, parameters for image processing and the...
US-5,829,040 Snooper circuit of a multi-processor system
A snooper circuit of a multi-processor system includes a plurality of processor boards each having a central processing unit, a cache memory, a cache controller...
US-5,829,029 Private cache miss and access management in a multiprocessor system with shared memory
A computer system including a group of CPUs, each having a private cache which communicates with its CPU to receive requests for information blocks and for...
US-5,829,027 Removable processor board having first, second and third level cache system for use in a multiprocessor...
A computer system which utilizes processor boards including a first level cache system integrated with the microprocessor, a second level external cache system...
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