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Searching: cpu processor





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Patent # Description
US-5,870,713 Information processor
An information processor having a scheduling function according to the present invention includes an input device, a memory for storing elementary item...
US-5,864,704 Multimedia processor using variable length instructions with opcode specification of source operand as result...
A media engine is disclosed herein which incorporates into a single chip structure the seven multimedia functions of video, 2D graphics, 3D graphics, audio,...
US-5,864,702 Computer system power management interconnection circuitry, systems and methods
A microcomputer integrated circuit (102) has a central processing unit (CPU) (702) first power management circuit (708) responsive to a system management...
US-5,862,308 Fault intercept and resolution process independent of operating system
A fault handling process in a computer system subject to CPU design errors and functioning under an operating system (OS) having an integral fault handling...
US-5,861,892 Image processing apparatus using compressed-data processing
An image processing apparatus in which image data is input, a generator generates area information and a processor processes the image data in accordance with...
US-5,860,148 Asynchronous transfer mode cell processing system with cell buffer space gathering
Methods and apparatus for processing cells in an asynchronous transfer mode (ATM) communication system. An ATM cell processor provides a cell buffer RAM (CBR)...
US-5,860,032 Autofocus device of a camera and method
An autofocus device and method for a camera that can process statistically the tracking and focusing of an object in high velocity motion. The device and method...
US-5,860,000 Floating point unit pipeline synchronized with processor pipeline
An FPU pipeline is synchronized with a CPU pipeline. Synchronization is achieved by having stalls and freezes in any one pipeline cause stalls and freezes in the...
US-5,854,641 Method and apparatus for display image rotation
A method and an apparatus for rotating images on a computer system is disclosed. The system includes a processor for accessing an image frame buffer using a set...
US-5,850,555 System and method for validating interrupts before presentation to a CPU
A programmable interrupt controller for use in computer systems including one or more CPUs is provided. The programmable interrupt controller includes an...
US-5,850,540 Method and apparatus for time-sharing CPU system bus in image generation system
Methods and apparatus for generating image data are provided. A memory and a data processor are coupled with a system bus. In certain embodiments a data...
US-5,850,058 Information processor
It is an object to provide a computer system including a practical input device which can be operated with more natural sense. The present input pen which is...
US-5,848,280 Apparatus for providing continuity of operation in a computer
An apparatus for providing continuity of operation in system which performs a process having CPU, input/output, main memory and power supply by restoring the...
US-5,848,262 Simulating digital systems by using vector processing
The inventive software device simulates the cycles of a digital device on a computer system. The inventive simulator allows model bits to be computed in parallel...
US-5,848,250 Processor upgrade system for a personal computer
A system for upgrading a personal computer includes a motherboard having upgrade sockets for upgrading the CPU and the clock oscillator without the need to...
US-5,847,303 Voice processor with adaptive configuration by parameter setting
A voice processing apparatus modulates an input voice into an output voice according to a parameter set. In the voice processing apparatus, a microphone inputs...
US-5,845,310 System and methods for performing cache latency diagnostics in scalable parallel processing architectures...
An integrated diagnostics system within a processing system for monitoring and identifying performance problems within the processing system. The processing...
US-5,845,138 CPU power management in non-APM systems
In order to save power in a computer system which lacks an APM BIOS or similar built-in power management facility, a power management V.times.D is hooked into...
US-5,845,132 Computer system power management interconnection circuitry, system and methods
A microcomputer integrated circuit (102) has a central processing unit (CPU) (702) first power management circuit (708) responsive to a system management...
US-5,845,060 High-performance fault tolerant computer system with clock length synchronization of loosely coupled processors
A fault-tolerant computer system employing multiple CPUs executing the same instruction stream under independent clock cycle timing. The CPUs deterministically...
US-5,844,574 System for enabling a CPU and an image processor to synchronously access a RAM
A synchronization system includes an image processor, a RAM, a CPU with an R/W interface, and a time controller. The time controller generates synchronization...
US-5,842,041 Computer system employing a control signal indicative of whether address is within address space of devices on...
An integrated processor is provided that employs an improved address decoding method during bus cycles of an external master. An external PCI master may initiate...
US-5,839,584 Motherboard stiffener and guide for processor modules and PCI cards
A structural foam, injection molded superstructure is attached to a motherboard by means of threaded inserts. The superstructure is formed with guide ways for...
US-5,835,788 System for transferring input/output data independently through an input/output bus interface in response to...
A programmable DMA controller that uses an instruction set dedicated to moving data efficiently over a bus, comprising a program memory, a program counter, a...
US-5,835,767 Method and apparatus for controlling available processor capacity
A method and system are disclosed for limiting the processing power of a CPU or CPUs in a multi-processing system comprising at least one constrained or hobbled...
US-5,835,554 X-ray imaging apparatus and x-ray generation detector for activating the same
An image processor comprises a CPU, a ROM for storing programs and data, a main storage memory for storing image data, parameters for image processing and the...
US-5,829,040 Snooper circuit of a multi-processor system
A snooper circuit of a multi-processor system includes a plurality of processor boards each having a central processing unit, a cache memory, a cache controller...
US-5,829,029 Private cache miss and access management in a multiprocessor system with shared memory
A computer system including a group of CPUs, each having a private cache which communicates with its CPU to receive requests for information blocks and for...
US-5,829,027 Removable processor board having first, second and third level cache system for use in a multiprocessor...
A computer system which utilizes processor boards including a first level cache system integrated with the microprocessor, a second level external cache system...
US-5,828,825 Method and apparatus for pseudo-direct access to embedded memories of a micro-controller integrated circuit via...
A method and apparatus are provided for testing memory locations of embedded memories or on-board caches of a micro-controller, a micro-processor or a CPU-based...
US-5,828,578 Microprocessor with a large cache shared by redundant CPUs for increasing manufacturing yield
Manufacturing yield is increased and cost lowered when a second, substantially identical CPU core is placed on a microprocessor die when the die contains a large...
US-5,826,035 Image display apparatus
An image display apparatus having a computer system and an image processor. The computer system includes: a personal computer having a CPU and a main memory; and...
US-5,822,788 Mechanism for prefetching targets of memory de-reference operations in a high-performance processor
A computer system provides enhanced performance when executing irregular code that include pointer de-reference operations. A memory controller of the computer...
US-5,822,769 Dual port random access memory matching circuit for versa module Europe bus (VMEbus)
A dual port random access memory (RAM) matching circuit for a Versa Module Europe bus (VMEbus) which makes it possible to have a higher capacity when ...
US-5,822,620 System for data alignment by using mask and alignment data just before use of request byte by functional unit
A method and implementing system are provided in which specific byte requests made by a functional unit within a computer system effect the return of a word...
US-5,822,324 Simulcasting digital video programs for broadcast and interactive services
To provide interactivity, data communication through wireless telephone network (e.g. cellular) is combined with a broadband digital transmission through a...
US-5,819,220 Web triggered word set boosting for speech interfaces to the world wide web
A computer system for user speech actuation of access to stored information, the system including a central processing unit, a memory and a user input/output...
US-5,818,240 Method and system for measuring signal transfer characteristics in the presence of WOW, flutter and...
A method and apparatus for fast response and distortion measurement of a signal transfer device. A computer processor generates a multitone test signal of...
US-5,815,651 Method and apparatus for CPU failure recovery in symmetric multi-processing systems
Method and apparatus for operating a multiprocessor data processing system (10) of the symmetric multiprocessor (SMP) type so as to continue the execution of a...
US-5,812,880 Multi-CPU system's data I/O processor with communication arbitrator performing access operations on I/O...
A first CPU and a second CPU form a multi-CPU system which distributes processes related to data input-output and computation. Input-output devices such as an...
US-5,812,870 Personal organizer with interface for recording digital voice files
A digital assistant computer device has an audio input interface and a memory adapted to receive audio input of significant time extent, and to convert the input...
US-5,812,439 Technique of incorporating floating point information into processor instructions
A floating point system and method employing instructions where instruction have incorporated floating point information. The floating point information...
US-5,811,706 Synthesizer system utilizing mass storage devices for real time, low latency access of musical instrument...
A synthesizer system includes a CPU and host memory operating a software routine. The software routine stores a first part of each waveform signal in a sample...
US-5,809,546 Method for managing I/O buffers in shared storage by structuring buffer table having entries including storage...
I/O protection key processes for protecting storage blocks (page frames) in a shared main storage against unwanted I/O accesses. Independent CP (central...
US-5,809,320 High-performance multi-processor having floating point unit
A pipelined CPU executing instructions of variable length, and referencing memory using various data widths. Macroinstruction pipelining is employed (instead of...
US-5,809,314 Method of monitoring system bus traffic by a CPU operating with reduced power
The present invention provides a method for maintaining cache coherency while minimizing the power consumption. The method includes operating a first processor...
US-5,805,909 Microprocessors or microcontroller utilizing FLL clock having a reduced power state
A microprocessor or micro-controller of a module design and adapted for low power is described. Each of the modules is addressed and controlled by the CPU in the...
US-5,805,581 Mobile communication system using various multiple access methods
A mobile communication system in which various access methods may be selected according to the user's priority. In the mobile communication system, each of...
US-5,802,564 Method and apparatus for increasing processor performance
A method and apparatus for reducing the number of cycles required to implement load instructions in a data processing system having a Central Processing Unit...
US-5,802,378 Performance monitoring in multiprocessor system with interrupt masking
The present invention provides a system and method which ensures that machine state data, for each CPU in an MP system, corresponding to a specific point in time...
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