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Searching: cpu processor





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Patent # Description
US-5,828,825 Method and apparatus for pseudo-direct access to embedded memories of a micro-controller integrated circuit via...
A method and apparatus are provided for testing memory locations of embedded memories or on-board caches of a micro-controller, a micro-processor or a CPU-based...
US-5,828,578 Microprocessor with a large cache shared by redundant CPUs for increasing manufacturing yield
Manufacturing yield is increased and cost lowered when a second, substantially identical CPU core is placed on a microprocessor die when the die contains a large...
US-5,826,035 Image display apparatus
An image display apparatus having a computer system and an image processor. The computer system includes: a personal computer having a CPU and a main memory; and...
US-5,822,788 Mechanism for prefetching targets of memory de-reference operations in a high-performance processor
A computer system provides enhanced performance when executing irregular code that include pointer de-reference operations. A memory controller of the computer...
US-5,822,769 Dual port random access memory matching circuit for versa module Europe bus (VMEbus)
A dual port random access memory (RAM) matching circuit for a Versa Module Europe bus (VMEbus) which makes it possible to have a higher capacity when ...
US-5,822,620 System for data alignment by using mask and alignment data just before use of request byte by functional unit
A method and implementing system are provided in which specific byte requests made by a functional unit within a computer system effect the return of a word...
US-5,822,324 Simulcasting digital video programs for broadcast and interactive services
To provide interactivity, data communication through wireless telephone network (e.g. cellular) is combined with a broadband digital transmission through a...
US-5,819,220 Web triggered word set boosting for speech interfaces to the world wide web
A computer system for user speech actuation of access to stored information, the system including a central processing unit, a memory and a user input/output...
US-5,818,240 Method and system for measuring signal transfer characteristics in the presence of WOW, flutter and...
A method and apparatus for fast response and distortion measurement of a signal transfer device. A computer processor generates a multitone test signal of...
US-5,815,651 Method and apparatus for CPU failure recovery in symmetric multi-processing systems
Method and apparatus for operating a multiprocessor data processing system (10) of the symmetric multiprocessor (SMP) type so as to continue the execution of a...
US-5,812,880 Multi-CPU system's data I/O processor with communication arbitrator performing access operations on I/O...
A first CPU and a second CPU form a multi-CPU system which distributes processes related to data input-output and computation. Input-output devices such as an...
US-5,812,870 Personal organizer with interface for recording digital voice files
A digital assistant computer device has an audio input interface and a memory adapted to receive audio input of significant time extent, and to convert the input...
US-5,812,439 Technique of incorporating floating point information into processor instructions
A floating point system and method employing instructions where instruction have incorporated floating point information. The floating point information...
US-5,811,706 Synthesizer system utilizing mass storage devices for real time, low latency access of musical instrument...
A synthesizer system includes a CPU and host memory operating a software routine. The software routine stores a first part of each waveform signal in a sample...
US-5,809,546 Method for managing I/O buffers in shared storage by structuring buffer table having entries including storage...
I/O protection key processes for protecting storage blocks (page frames) in a shared main storage against unwanted I/O accesses. Independent CP (central...
US-5,809,320 High-performance multi-processor having floating point unit
A pipelined CPU executing instructions of variable length, and referencing memory using various data widths. Macroinstruction pipelining is employed (instead of...
US-5,809,314 Method of monitoring system bus traffic by a CPU operating with reduced power
The present invention provides a method for maintaining cache coherency while minimizing the power consumption. The method includes operating a first processor...
US-5,805,909 Microprocessors or microcontroller utilizing FLL clock having a reduced power state
A microprocessor or micro-controller of a module design and adapted for low power is described. Each of the modules is addressed and controlled by the CPU in the...
US-5,805,581 Mobile communication system using various multiple access methods
A mobile communication system in which various access methods may be selected according to the user's priority. In the mobile communication system, each of...
US-5,802,564 Method and apparatus for increasing processor performance
A method and apparatus for reducing the number of cycles required to implement load instructions in a data processing system having a Central Processing Unit...
US-5,802,378 Performance monitoring in multiprocessor system with interrupt masking
The present invention provides a system and method which ensures that machine state data, for each CPU in an MP system, corresponding to a specific point in time...
US-5,801,975 Computer modified to perform inverse discrete cosine transform operations on a one-dimensional matrix of...
A multimedia extension unit (MEU) is provided for performing various multimedia-type operations. The MEU can be coupled either through a coprocessor bus or a...
US-5,801,785 Method and system for processing two analog composite video signals
Disclosed is a method and apparatus for processing two analog composite video signals to be displayed to a human observer. The system includes at least a first...
US-5,799,203 System for receiving peripheral device capability information and selectively disabling corresponding...
A system and method for providing information regarding system support capabilities to a processor. A computer system includes a processing unit, a main memory...
US-5,798,994 Multi-layered optical disk reading method using liquid crystal diffraction device
A multi-layered optical disk reading method which reproduces encoded data from each data layer by focusing a laser beam precisely onto the data layer of the...
US-5,797,031 Method and apparatus for peripheral device control by clients in plural memory addressing modes
A digital data processor has a central processing unit (CPU) that operates in plural addressing modes and or more adapters for receiving peripheral devices,...
US-5,797,029 Sound board emulation using digital signal processor using data word to determine which operation to perform...
An improved audio-output device coupleable to a computer system, in which a DSP operating under software control emulates a common command interface. The command...
US-5,796,996 Processor apparatus and its control method for controlling a processor having a CPU for executing an...
In the case where a CPU executes a write instruction of a control program for a memory mapped register of an external memory, a write address and write data are...
US-5,796,566 Printed circuit board having conductors which can be decoupled for isolating inactive integrated circuits...
A communication system is presented whereby sequences of video screens sent from a host CPU to a video controller can be stored and subsequently retrieved by a...
US-5,795,297 Ultrasonic diagnostic imaging system with personal computer architecture
An ultrasonic diagnostic imaging system is provided with a personal computer platform which processes digital echo signals and produces ultrasonic image signals...
US-5,793,629 Distributed processing unit
A distributed processing unit which permits easy modification of set data that has been written in a memory (19) of a coin mechanism (1) which constitutes a...
US-5,793,445 Host CPU independent video processing unit
The present invention relates to a video display processor comprised apparatus for receiving digital input signal components of a signal to be displayed,...
US-5,791,987 Method for users to play the kung-ming chess on micro-processor-based systems
A game software is devised for a user to play the Kung-Ming Chess on a microprocessor-based system having at least a CPU, a memory unit, a screen, and a cursor...
US-5,790,781 Dynamic scaling of CPU cycle consumption in an I/O subsystem of a computer system
A method for dynamically scaling consumption of processor cycles by a task executing in a multi-tasking input/output subsystem, wherein a performance task...
US-5,790,776 Apparatus for detecting divergence between a pair of duplexed, synchronized processor elements
A multiprocessor system includes a number of sub-processor systems, each substantially identically constructed, and each comprising a central processing unit...
US-5,790,134 Hardware architecture for image generation and manipulation
An image generation and manipulation system includes an integrated circuit dedicated exclusively to direct manipulation of pixel values in a frame buffer. This...
US-5,787,481 System for managing write and/or read access priorities between central processor and memory operationally...
A system for managing write and/or read access priorities between a central processing unit (CPU) and at least one memory (11) which includes mechanism for...
US-5,786,822 Method and apparatus for mapping texture on an object displayed at a varying view angle from an observer
A plurality of texture data of a surface of an object to be displayed as viewed from a plurality of assumed directions are stored in a texture memory. When a CPU...
US-5,784,271 Data processor for interruption control between the CPU and the interruption controller
A data processor comprises a CPU and an interruption controller connected with control signal line. The CPU changes signal level at a control signal line in...
US-5,781,444 Distributed processing unit connectable to external processing means
A distributed processing unit which permits easy modification of set data that has been written in a memory (19) of a coin selector (1-1) which constitutes a...
US-5,781,199 Parallel processing method for use with graphics processor
A parallel processing method for use with a graphics processor wherein graphics processing is performed by each of configured command processors efficiently in a...
US-5,778,433 Computer system including a first level write-back cache and a second level cache
An apparatus for monitoring and decoding processor bus cycles and flushing a second level cache upon decoding a special flush acknowledge cycle. The CPU...
US-5,778,423 Prefetch instruction for improving performance in reduced instruction set processor
A high-performance CPU of the RISC (reduced instruction set) type employs a standardized, fixed instruction size, and permits only simplified memory access data...
US-5,778,252 On-board interface for concurrent seeks of multiple disk drives of a computer
An interface allows a given CPU (Central Processing Unit) to communicate concurrently with a large number of disk drives in a high-performance, low-cost system....
US-5,774,133 Computer system with improved pixel processing capabilities
A computer system having a pixel processing unit with multiple subprocessors receives positional data defining graphical objects from the CPU and writes pixel...
US-5,771,371 Method and apparatus for optimizing the display of forms in a data processing system
A method and apparatus for increasing efficiency in displaying characters on a display within the data processing system. A plurality of processes for displaying...
US-5,771,361 Data processor having shared terminal for monitoring internal and external memory events
In a data processor, an internal memory stores instruction codes and a central processing unit reads an instruction code form the memory and produces an external...
US-5,771,247 Low latency error reporting for high performance bus
A system and method are provided that use a determination of bad data parity and the state of an error signal (Derr.sub.--) as a functional signal indicating a...
US-5,767,866 Computer system with efficient DRAM access
A computer system includes one or more display devices, such as a cathode ray tube (CRT) or liquid crystal display (LCD) for providing a visible display to a...
US-5,765,197 Method and system for authentication of a memory unit for a computer system
A computer system for high-performance video and audio manipulations comprising a locked memory cartridge and an audio/video/compact disk (CD) drive...
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