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Searching: cpu processor





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Patent # Description
US-5,590,362 Database engine predicate evaluator
A processor functioning as a coprocessor attached to a central processing complex provides efficient execution of the functions required for database processing:...
US-5,590,357 Integrated CPU core and parallel, independently operating DSP module and time-critical core priority scheme
An integrated data processing system includes a shared internal bus for transferring both instructions and data. A shared bus interface unit is connected to the...
US-5,588,131 System and method for a snooping and snarfing cache in a multiprocessor computer system
An improved multiprocessor computer system with an improved snarfing cache is disclosed. The multiprocessor system includes a main memory, I/O interface, and a...
US-5,588,111 Fault-tolerant computer system having switchable I/O bus interface modules
A computer system in a fault-tolerant configuration employs multiple identical CPUs executing the same instruction stream, with multiple, identical memory...
US-5,586,308 Clock control unit responsive to a power management state for clocking multiple clocked circuits connected thereto
An integrated processor is fabricated on a single monolithic circuit and employs circuitry to accommodate data-intensive, view-intensive and voice-intensive...
US-5,586,284 Triple register RISC digital signal processor
The STREAMER FOR RISC DIGITAL SIGNAL PROCESSOR shown herein allows a CPU 46 to interface with a memory 60 via data registers 50. Pre-fetch and post-store of the...
US-5,584,031 System and method for executing a low power delay instruction
A system and method is provided for executing a low power no operation instruction in a data processor (10) with a minimal amount of power consumption. In the...
US-5,583,560 Method and apparatus for audio-visual interface for the selective display of listing information on a display
An interactive audio-visual (A/V) transceiver is advantageously coupled to a television and/or telephone (T/T) cable, a TV, a video recorder (VCR), and other A/V...
US-5,583,506 Signal processing system and method
An avionic digital signal processing system for a plurality of different types of input sensors such as radar, electro-optical, and electronic warfare that...
US-5,581,727 Hierarchical cache system flushing scheme based on monitoring and decoding processor bus cycles for flush/clear...
An apparatus for monitoring and decoding processor bus cycles and flushing a second level cache upon decoding a special flush acknowledge cycle. The CPU...
US-5,579,504 Multi-processor computer system having shared memory, private cache memories, and invalidate queues having...
Multi-processor systems are often implemented using a common system bus as the communication mechanism between CPU, memory, and I/O adapters. It is also common...
US-5,577,260 Data processing system having a serial interface comprising an end-of-transmission flag
In a data processor including a serial interface, the serial interface internally includes a transmission end flag formed of a RS flipflop which set in response...
US-5,574,847 Computer graphics parallel system with temporal priority
Front end processors in a graphics architecture execute parallel scan conversion and shading to process individually assigned primitive objects for providing...
US-5,574,770 Method for controlling overload of main processor of distributed switching system with hierarchy structure
A method for controlling an overload of a main processor by assigning to the main processor of a distributed switching system with a hierarchy structure a...
US-5,572,566 X-ray imaging apparatus and X-ray generation detector for activating the same
An image processor comprises a CPU, a ROM for storing programs and data, a main storage memory for storing image data, parameters for image processing and the...
US-5,568,624 Byte-compare operation for high-performance processor
A high-performance CPU of the RISC (reduced instruction set) type employs a standardized, fixed instruction size, and permits only simplified memory access data...
US-5,568,622 Method and apparatus for minimizing the number of control words in a brom control store of a microprogrammed...
Method and apparatus to reduce the number of control words stored in a read only control store of a microprogrammed unit of the CPU of a large scale computer. A...
US-5,568,617 Processor element having a plurality of processors which communicate with each other and selectively use a...
A processor for constructing a single processor system or multiprocessor system comprises, within a base processor element constituting the processor, two CPU...
US-5,566,352 Register-read acknowledgment and prioritization for integration with a hardware-based interrupt acknowledgment...
A register-based computer architecture is particularly suited for using a common resource, such as a host processor or CPU, to respond to multiple devices such...
US-5,566,345 SCSI bus capacity expansion controller using gating circuits to arbitrate DMA requests from a plurality of disk...
In a data processing system having a data processor coupled to a SCSI channel disposed for transmitting and receiving data between the data processor and a...
US-5,561,822 System status maintaining and supporting apparatus sharing one console with a CPU
A system status maintaining and supporting apparatus in which more than two boards can be utilized with one console for communication, capable of monitoring the...
US-5,561,783 Dynamic cache coherency method and apparatus using both write-back and write-through operations
A dynamic cache coherency method and apparatus providing enhanced microprocessor system performance are described. The method and apparatus are advantageously...
US-5,561,779 Processor board having a second level writeback cache system and a third level writethrough cache system which...
A computer system which utilizes processor boards including a first level cache system integrated with the microprocessor, a second level external cache system...
US-5,560,023 Automatic backup system for advanced power management
A suspend/resume computer system having a CPU, a non-volatile storage device, volatile registers and memory data, a power management processor, a backup suspend...
US-5,559,952 Display controller incorporating cache memory dedicated for VRAM
A frame buffer cache is arranged to store part of image data in an image memory so that a CPU and a drawing processor can perform image data read/write...
US-5,557,769 Mechanism and protocol for maintaining cache coherency within an integrated processor
An integrated processor includes CPU core, cache memory, and cache controller coupled to a local bus via a local bus interface. The integrated processor further...
US-5,557,766 High-speed processor for handling multiple interrupts utilizing an exclusive-use bus and current and previous...
A processor includes a bank-structured memory and is capable of handling multiple interrupts. The processor includes a central processing unit (CPU) comprising a...
US-5,555,395 System for memory table cache reloads in a reduced number of cycles using a memory controller to set status...
A method and apparatus for reducing the latency of TLB and segment descriptor reloads by eliminating the extra read/write cycles normally required for these...
US-5,555,197 Video signal processor and method for processing a scanning line regardless of the synchronizing signal
A coprocessor is incorporated in a processor comprising a CPU, an instruction cache, a data memory, a bus controller, an interruption control section and a DMA...
US-5,553,236 Method and apparatus for testing a clock stopping/starting function of a low power mode in a data processor
A processor (10) has an internal clock circuit (12), a CPU (14), and a test controller (16). The CPU (14) has a low-power mode of operation and a normal mode of...
US-5,553,228 Accelerated interface between processors and hardware adapters
Overall graphics performance in a computer graphics system is improved by an accelerated interface between high performance microprocessors and hardware adapters...
US-5,550,999 Information processing system which can check secondary storage medium having prescribed relation therewith and...
This invention provides an information processing system for a secondary storage medium which can prevent illegitimate reproduction of secondary storage media...
US-5,548,769 Database engine
A processor functioning as a coprocessor attached to a central processing complex provides efficient execution of the functions required for database processing:...
US-5,548,711 Method and apparatus for fault tolerant fast writes through buffer dumping
An array controller including a DATA-RAM and a SHADOW-RAM. Both the DATA-RAM and the SHADOW-RAM are coupled to a first and second memory interface. Each memory...
US-5,546,563 Single chip replacement upgradeable computer motherboard with enablement of inserted upgrade CPU chip
A computer system is made capable of accepting more than one type of central processor including a plurality of sockets for receiving more than one type of...
US-5,546,547 Memory bus arbiter for a computer system having a dsp co-processor
An arbitration scheme for a computer system in which a digital signal processor resides on the computer system's memory bus without requiring a block of...
US-5,546,397 High reliability access point for wireless local area network
A high reliability access point for RF communications in a wireless local area network. The high reliability access point includes a central processing unit...
US-5,546,306 Multiple processor throttle control apparatus for an internal combustion engine
An electronic control apparatus for an engine of a vehicle has a first CPU for fuel control which controls the amount of fuel to be supplied to the engine and a...
US-5,544,344 Apparatus for caching smram in an intel processor based computer system employing system management mode
An apparatus and method for caching SMRAM in an Intel.RTM. CPU employing system management mode. A cache for the CPU includes a plurality of data entries and an...
US-5,544,341 Data access apparatus for preventing further cache access in case of an error during block data transfer
A data processor and method for preventing access to a cache memory when an abnormality occurs during a block data transfer. The data processor is provided with...
US-5,543,940 Method and apparatus for converting color scanner signals into colorimetric values
A method and apparatus for reconstructing a spectrum realizable in a medium from signals of a color scanner, includes the steps of obtaining an initial spectrum...
US-5,542,075 Method and apparatus for improving performance of out of sequence load operations in a computer system
The invention provides for improved performance of out of sequence load operations. The system has an improved compiler, with an optimizer, an improved CPU with...
US-5,542,064 Data read/write method by suitably selecting storage units in which multiple copies of identical data are...
When a CPU serving as a higher rank apparatus issues an input command to a secondary storage device having a plurality of disk drives, a predetermined number of...
US-5,542,059 Dual instruction set processor having a pipeline with a pipestage functional unit that is relocatable in time...
A CPU pipeline is able to process instructions from a complex instruction set computer CISC instruction set and from a reduced instruction set computer RISC set....
US-5,541,850 Method and apparatus for forming an integrated circuit including a memory structure
A set of circuit specifications including an internal memory structure is developed and then described in a hardware description language that is entered into a...
US-5,539,913 System for judging whether a main processor after processing an interrupt is required to process the I/O...
An information processing system according to the present invention judges whether or not an interruption accepted at a local processor for input/output control...
US-5,537,622 Database engine
A processor functioning as a coprocessor attached to a central processing complex provides efficient execution of the functions required for database processing:...
US-5,537,604 Database engine
A processor functioning as a coprocessor attached to a central processing complex provides efficient execution of the functions required for database processing:...
US-5,537,603 Database engine
A processor functioning as a coprocessor attached to a central processing complex provides efficient execution of the functions required for database processing:...
US-5,537,602 Process system for controlling bus system to communicate data between resource and processor
A processor system includes an external resource, and a main CPU with a built-in bus control mechanism outputting an address bus and control signals and having a...
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