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Searching: cpu processor





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Patent # Description
US-5,537,575 System for handling cache memory victim data which transfers data from cache to the interface while CPU...
A method and apparatus in a computer system for handling cache memory victim data for updating main memory. The invention operates in a computer system having...
US-5,537,544 Portable computer system having password control means for holding one or more passwords such that the...
A portable computer system includes a keyboard for inputting at least a password, and a main CPU for controlling the system operation to perform a data...
US-5,535,414 Secondary data transfer mechanism between coprocessor and memory in multi-processor computer system
A computer system having a CPU, a memory subcircuit, a peripheral subcircuit, a primary SCSI controller, which generates a SCSI bus, a coprocessor, and a...
US-5,535,339 Dual processor controlled compact disk-interactive system
A compact disk-interactive (CD-I) system which can reproduce CD-ROMs programmed using different codes as well as general compact disks for use as a multimedia...
US-5,535,137 Random access audio/video processor with compressed video resampling to allow higher bandwidth throughput
A random access audio/video processor having multiple outputs is disclosed. The processor includes a main control unit with analog video and audio back panels,...
US-5,530,899 Archival and retrieval system accessing an external storage by polling internal queues from remote terminals...
An archival and retrieval system which is connected to a host computer through an asynchronous serial line. The system operates unassisted through this serial...
US-5,530,893 System for selectively communicating information between processor and built-in keyboard and external input means
A data processing system having a built-in keyboard and an external input device which are alternately activated. If there is no command from the external...
US-5,530,889 Hierarchical structure processor having at least one sub-sequencer for executing basic instructions of a macro...
A hierarchical structure processor including a memory for storing processing instruction code data described sequentially; a main CPU for fetching and decoding...
US-5,530,883 Database engine
A processor functioning as a coprocessor attached to a central processing complex provides efficient execution of the functions required for database processing:...
US-5,530,879 Computer system having power management processor for switching power supply from one state to another...
A computer system having a CPU, a power management processor, a switch, a modem, a timer, an override circuit, a glitch circuit, and a power supply in circuit...
US-5,530,877 Apparatus for providing continuity of operation in a computer
An apparatus for providing continuity of operation in system which performs a process having CPU, input/output, main memory and power supply by restoring the...
US-5,526,495 Bus control system in a multi-processor system
A bus arbiter permits an answer transfer request to utilize a system bus with higher priority than a command transfer request, thereby increasing the processing...
US-5,526,487 System for multiprocessor communication
A system for interprocessor communication including a shared register resource accessible by any one of the processors through the using internal communication...
US-5,522,058 Distributed shared-memory multiprocessor system with reduced traffic on shared bus
A distributed shared-memory multiprocessor system capable of reducing a traffic on the shared bus, without imposing any constraint concerning the types of...
US-5,519,879 Integrated circuit having CPU and DSP for executing vector lattice propagation instruction and updating values...
An integrated data processing system includes a shared internal bus for transferring both instructions and data. A shared bus interface unit is connected to the...
US-5,517,556 Call processing system with facsimile processing
An improved telephone call processing apparatus for processing facsimile messages. The facsimile processing apparatus comprises a message control system...
US-5,515,529 Central processor with duplicate basic processing units employing multiplexed data signals to reduce inter-unit...
In order to validate data manipulation results in a CPU which incorporates duplicate BPUs for integrity, which BPUs are typically each implemented on a single...
US-5,513,358 Method and apparatus for power-up state initialization in a data processing system
A method and apparatus for implementing a power-up state initialization. A power sense circuit provides a signal for indicating when the power supply, V.sub.DD,...
US-5,513,255 Method for controlling overload of distributed processors of full electronic switching system
A method for controlling an overload of distributed processors of a full electronic switching system, capable of automatically calculating the number of calls to...
US-5,511,219 Mechanism for implementing vector address pointer registers in system having parallel, on-chip DSP module and...
An integrated data processing system includes a shared internal bus for transferring both instructions and data. A shared bus interface unit is connected to the...
US-5,511,204 Performing system tasks at power-off using system management interrupt
A computer system having a CPU, a non-volatile storage device, a power management processor having a volatile power management configuration, and a power supply...
US-5,509,663 Image processing apparatus and external storage unit
An image processing apparatus includes a CPU which executes a program read from an external storage unit, and a video processor. In the video processor, color...
US-5,509,120 Method and system for detecting computer viruses during power on self test
A computer system includes a system processor, an information storage apparatus, at least one booting device from which the computer system can be booted, and a...
US-5,508,940 Random access audio/video processor with multiple outputs
A random access audio/video processor having multiple outputs is disclosed. The random access audio/video processor includes a main control unit having an analog...
US-5,503,145 Computer-controlling life support system and method for mixed-gas diving
A computer-controlled life support system and method for mixed-gas diving, having separate supplies of oxygen and diluent gas or gases is provided. Multiple...
US-5,499,353 Cache address strobe control logic for stimulated bus cycle initiation
A cache control system generates an alternate cache control signal to unload a CPU driven bus control signal without interfering with the bus control of the...
US-5,497,373 Multi-media interface
A multi-media interface universally and flexibly supports present (and contemplated) messaging applications including voice mail, facsimile mail, electronic...
US-5,495,579 Central processor with duplicate basic processing units employing multiplexed cache store control signals to...
In order to validate data manipulation results in a CPU which incorporates duplicate basic processing units or integrity, which BPUs are typically each...
US-5,495,485 Transmission of analog and digital information across a single line
Apparatus for sending and receiving both analog and digital information from a single information transmission medium. The apparatus includes a core processor...
US-5,493,684 Power management architecture including a power management messaging bus for conveying an encoded activity...
An integrated processor is provided that includes a CPU core coupled to a variety of on-chip peripheral devices such as a DMA controller, an interrupt...
US-5,493,672 Concurrent simulation of host system at instruction level and input/output system at logic level with two-way...
A method and apparatus is provided for integrating a logic level simulation with an instruction level simulation for more accurate and faster system level...
US-5,493,655 Method and apparatus for upgrading a data processing system from a single processor system to a multiprocessor...
A data processing system includes a first central processing unit (CPU), at least one expansion port into which additional CPUs may be inserted, and a system...
US-5,493,557 Device for recording and retrieving of manually inputted data with a timing signal in an optical storage medium
An information processor comprising a tablet for inputting script data; a timer for outputting a time signal; a RAM as a temporary storage means; a CPU...
US-5,491,828 Integrated data processing system having CPU core and parallel independently operating DSP module utilizing...
An integrated data processing system includes a shared internal bus for transferring both instructions and data. A shared bus interface unit is connected to the...
US-5,491,799 Communication interface for uniform communication among hardware and software units of a computer system
A SYStem COMmunication interface (SYSCOM) unit provides uniform communication between hardware and software units of a computer system. The computer units...
US-5,491,793 Debug support in a processor chip
A central processing unit (CPU) with facilities for debug support. The debug support facilities include debug support unit (DSU), a debug support interface bus,...
US-5,491,788 Method of booting a multiprocessor computer where execution is transferring from a first processor to a second...
A multiprocessor computer system handles the failure of one or more of its processors without totally disabling the system. On power up, all of the CPUs are...
US-5,490,279 Method and apparatus for operating a single CPU computer system as a multiprocessor system
A method and apparatus for upgrading a uniprocessor system to a multiprocessing system simply by the insertion of a second microprocessor integrated circuit. The...
US-5,490,096 Visual simulation apparatus
A CPU is connected to a memory storing programs for operating the CPU and a number of simulators, a display unit and a mouse for pointing a particular data shown...
US-5,488,710 Cache memory and data processor including instruction length decoding circuitry for simultaneously decoding a...
A cache memory, and a data processor including the cache memory, for processing at least one variable length instruction from a memory and outputting processed...
US-5,488,688 Data processor with real-time diagnostic capability
A data processor (20) includes a diagnostic circuit (23) with a first-in, first-out memory (FIFO) (25) for storing sequential states of an internal bus, such as...
US-5,487,173 DTMF detection in an integrated data processing system
The present invention is directed to an integrated data processing system that includes a general purpose (GP) CPU core for processing data in accordance with a...
US-5,485,623 Information processor having high speed and safety resume system
An information processor operating with a battery writes data which exists in a register of a CPU at that time into a predetermined stack area for transfer of an...
US-5,485,602 Integrated circuit having a control signal for identifying coinciding active edges of two clock signals
A data processing system receives a CLK signal for performing operations internal to a data processor (10). The data processor (10) has a CPU (12) which performs...
US-5,485,576 Chassis fault tolerant system management bus architecture for a networking
A fault tolerant system management bus architecture for a networking chassis includes a primary path for transmission of system management information and a...
US-5,481,689 Conversion of internal processor register commands to I/O space addresses
A pipelined CPU executing instructions of variable length, and referencing memory using various data widths. Macroinstruction pipelining is employed (instead of...
US-5,481,663 Word processors for performing an automatic layout process
A word processor with an automatic layout function which automatically moves a possible figure, related to a text of a document to be moved in an automatic...
US-5,479,626 Signal processor contexts with elemental and reserved group addressing
The signal processor including a CPU 10 which selects a context register 16, the contents of which configure an address generator 20 and a data type converter...
US-5,475,315 Method and apparatus for fast response and distortion measurement
A method and apparatus for fast response and distortion measurement of a signal transfer device. A computer processor generates a multitone test signal of...
US-5,473,264 Methods and apparatus for electrically terminating a high speed communications pathway
A circuit arrangement and methods for sensing whether line terminator devices are present at terminal ends of high speed communications pathways, and enabling a...
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