Easy To Use Patents Search & Patent Lawyer Directory

At Patents you can conduct a Patent Search, File a Patent Application, find a Patent Attorney, or search available technology through our Patent Exchange. Patents are available using simple keyword or date criteria. If you are looking to hire a patent attorney, you've come to the right place. Protect your idea and hire a patent lawyer.

Searching: cpu processor





Search by keyword, patent number, inventor, assignee, city or state:




Patent # Description
US-5,388,217 Distributing system for multi-processor input and output using channel adapters
Four clusters of 16 CPU's each are each associated with a solid state memory and a main memory. Each CPU is uniquely associated with a channel arbitrator which...
US-5,388,073 Semiconductor integrated circuit device and digital processor employing the same
A semiconductor memory device for use in a digital data processor together with a central processing unit (CPU) receives address signals which are validated for...
US-5,386,537 System with reduced instruction set processor accessing plural memories at different speeds using bank interleaving
A data processor adopts a CPU that is represented by an RISC type CPU and capable of processing one instruction in one clock cycle. The data processor has an...
US-5,381,552 Programmable system for prioritizing and collecting central processor unit interrupts
A priority selector prioritizes interrupts associated with each ASIC of a plural ASIC system in accordance with a programmed sequence. A table in each ASIC...
US-5,381,543 Processor system with dual clock
The present invention provides a means for operating the CPU in a single chip microprocessor at a multipe of the cycle speed of the memory bus. With the present...
US-5,379,435 Apparatus for providing continuity of operation in a computer
An apparatus for providing continuity of operation in system which performs a process having CPU, input/output, main memory and power supply by restoring the...
US-5,379,395 Semiconductor integrated circuit for central processor interfacing which enables random and serial access to...
A semiconductor integrated circuit serves as an interface between a CPU and the outside enabling communication between systems. More specifically, when a...
US-5,379,393 Cache memory system for vector processing
A cache memory system for use during vector processing in a processor. The processor contains a central processing unit (CPU) and a main memory. The system...
US-5,377,345 Methods and apparatus for providing multiple pending operations in a cache consistent multiple processor...
Apparatus and methods for a cache controller preserving cache consistency and providing multiple outstanding operations in a cache memory structure supporting a...
US-5,377,324 Exclusive shared storage control system in computer system
The present invention comprises a plurality of processor modules and shared storage modules connected through a system bus. It improves system performance by...
US-5,374,940 System for operating a plurality of graphics displays from a single computer
Multiple video boards of the general purpose type (e.g. EGA or VGA boards) and their associated monitors are operated by a single computer of the personal...
US-5,371,861 Personal computer with small computer system interface (SCSI) data flow storage controller capable of storing...
This invention relates to personal computers, and more particularly to a personal computer using a small computer systems interface (SCSI) controller for...
US-5,367,705 In-register data manipulation using data shift in reduced instruction set processor
A high-performance CPU of the RISC (reduced instruction set) type employs a standardized, fixed instruction size, and permits only simplified memory access data...
US-5,367,689 Apparatus for strictly ordered input/output operations for interrupt system integrity
A method and apparatus which maintains strict ordering of processor cycles to guarantee that a processor write, such as an EOI instruction, is not executed to...
US-5,367,662 Distributed machine state controlled processor system with a CPU clocked with a reference signal delayed from a...
A controller (MSC) for generating a basic control signal to permit a CPU to access to a resource in a processor system is arranged in each of local control...
US-5,365,496 Potty trainer timepiece
A device for time conditioning children. The device comprises an alarm circuit for producing an alarm signal, an alarm timer for timing an alarm interval and...
US-5,363,488 Input/output command issuing control system in data processing system
An I/O command issuing control system is applied to a data processing system including a processor module provided with a CPU and an adaptor module which is...
US-5,357,622 Apparatus for queing and storing data writes into valid word patterns
A digital computer system has a central processor unit (CPU) and a store queue facility. The store queue facility receives full digital words or segments thereof...
US-5,355,471 Multiprocessor cache coherency tester that exercises the coherency logic exhaustively and also detects errors...
A cache coherency test exercises cache coherency logic exhaustively such that any cache coherency failures liable to occur will occur. The CPU(s) which caused...
US-5,355,467 Second level cache controller unit and system
A second level cache memory controller, implemented as an integrated circuit unit, operates in conjunction with a secondary random access cache memory and a main...
US-5,353,416 CPU lock logic for corrected operation with a posted write array
A shared bus arbitration system is disclosed which provides logic allowing multiple processors to co-exist on a common bus. In the present invention, the host...
US-5,353,415 Method and apparatus for concurrency of bus operations
A method and apparatus for performing concurrent operations on the host bus, expansion bus, and local I/O bus as well as the processor bus connecting the...
US-5,349,962 Method and apparatus for detecting epileptic seizures
A method and apparatus for accurately determining the onset or occurrence of an epileptic seizure is disclosed. The system includes an electroencephalograph...
US-5,349,579 Telecommunication switch with programmable communications services
A telecommunications switch which may be configured to provide a variety of user-programmable communications or call processing services. Such services may be...
US-5,345,564 Serial communication peripheral integrated electronic circuit that recognizes its unique address before the...
A peripheral integrated electronic circuit of the type having an interface for serially transferring data between it and a central processing unit ("CPU") in a...
US-5,339,407 Recovery of cached data from a malfunctioning CPU
Recovery of data from a store-to cache in a malfunctioning CPU, is accomplished without exercising the hardware of the malfunctioning CPU. A data path which is...
US-5,337,416 Apparatus for managing page zero accesses in a multi-processor data processing system
Apparatus for use in a multi-CPU data processing system (10) wherein each CPU (12-18) is coupled to a common bus (20) and through the common bus to a main memory...
US-5,335,234 Error correction code pipeline for interleaved memory system
A data stream process pipeline and method of transferring data from a storage device to a central processor unit (CPU) or cache memory includes an input latch...
US-5,333,319 Virtual storage data processor with enhanced dispatching priority allocation of CPU resources
Dispatching improvements in operating systems are described for multiprogrammed data processing systems. A common priority dispatching mechanism for applications...
US-5,333,285 System crash detect and automatic reset mechanism for processor cards
A hardware and software mechanism is provided for ensuring that a feature processor card, included with other feature cards in a host system, can be reset...
US-5,333,278 Multiprocessor system with program change function controlled by one processor
In a multiprocessor system with program change function according to the present invention, a special CPU among a plurality of CPU's inputs program data from...
US-5,333,259 Graphic information processing system having a RISC CPU for displaying information in a window
A computer related system including a reduced instruction set computer (RISC) central processing unit for effectively processing a data bottleneck phenomenon due...
US-5,327,566 Stage saving and restoring hardware mechanism
A hardware mechanism capable of performing state saving and restoring operations, for use in a computer environment having a computer system having a central...
US-5,325,516 Processor system with dual clock
The present invention provides a means for operating the CPU in a single chip microprocessor at a multipe of the cycle speed of the memory bus. With the present...
US-5,321,823 Digital processor with bit mask for counting registers for fast register saves
A high-performance, pipelined CPU in which an improved method is used for saving registers in memory upon the occurrence of a procedure CALL or RETURN. The...
US-5,321,806 Method and apparatus for transmitting graphics command in a computer graphics system
A residue buffer, for temporary storage of portions of transmissions from a CPU to a graphics processor. Graphics commands are transmitted, in transmission units...
US-5,321,505 Computer scalable visualization system
A scalable visualization system includes a plurality of scalable tiles (10) that each comprise a display portion (18) and a processing portion (20). Each of the...
US-5,317,752 Fault-tolerant computer system with auto-restart after power-fall
A fault-tolerant computer system employs a power supply system including a battery backup so that upon AC power failure the system can execute an orderly...
US-5,317,726 Multiple-processor computer system with asynchronous execution of identical code streams
A fault-tolerant computer system employs multiple identical CPUs executing the same instruction stream, each with their own independent memory. The multiple CPUs...
US-5,317,720 Processor system with writeback cache using writeback and non writeback transactions stored in separate queues
A pipelined CPU executing instructions of variable length, and referencing memory using various data widths. A writeback cache is used (instead of writethrough)...
US-5,317,715 Reduced instruction set computer system including apparatus and method for coupling a high performance RISC...
Methods and apparatus are disclosed for transferring data to and from the Local Bus of a reduced instruction set computer (RISC) system, to which a first set of...
US-5,315,694 High-speed color saturation converter for digital color data
A high-speed saturation converter for a color image, comprising first R, G, and B image memories for storing digital color image data separated into R, G, and B,...
US-5,311,458 CPU with integrated multiply/accumulate unit
An integrated circuit (IC) processor architecture is disclosed that implements hardware, signal processing (DSP) functions with less digital improved speed and a...
US-5,307,464 Microprocessor and method for setting up its peripheral functions
A single chip microprocessor 1 includes a CPU 2 and a sub-processor 5 for software implementation of peripheral functions of the microprocessor 1. Sub-processor...
US-5,305,460 Data processor
In a microcomputer having two program execution states including a supervisor state and a user state, there is disposed a flag or a register having such a flag...
US-5,303,342 Method and apparatus for assembling a composite image from a plurality of data types
A method and apparatus for combining multiple image data files of differing sizes, resolutions, and formats in real time into a single data stream for conversion...
US-5,301,302 Memory mapping and special write detection in a system and method for simulating a CPU processor
The system and method of this invention simulates the flow of control of an application program targeted for a specific instruction set of a specific processor...
US-5,301,272 Method and apparatus for address space aliasing to identify pixel types
A CPU or other graphics processor provides a pixel data stream to a graphics controller over a system bus. The pixel data stream includes a graphics controller...
US-5,299,318 Processor with a plurality of microprogrammed units, with anticipated execution indicators and means for...
A data processing system having processors with large instruction sets optimized for the execution of brief instructions. The processor (CPU) comprises a...
US-5,297,260 Processor having a plurality of CPUS with one CPU being normally connected to common bus
A processor for constructing a single processor system or multiprocessor system comprises, within a base processor element constituting the processor, two CPU...
← Previous | 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 | Next →

File A Patent Application

  • Protect your idea -- Don't let someone else file first. Learn more.

  • 3 Easy Steps -- Complete Form, application Review, and File. See our process.

  • Attorney Review -- Have your application reviewed by a Patent Attorney. See what's included.