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Patent # Description
US-8,756,357 Data processor and control system
Provided are a data processor, and a control system, in which an interrupt controller and an event link controller are adopted. The event link controller...
US-8,751,843 Computer energy conservation with a scalable PSU configuration
A power management method for use by a blade server or other networked computer having a CPU, memory, network interface, and timer. The method includes...
US-8,751,837 Low-power subsystem for portable computers
A low power subsystem for a portable computer is described. In one example, the portable computer includes a computer system and low power multimedia center....
US-8,751,797 Integrated circuit with restricted data access
A semiconductor integrated circuit includes a hardware mechanism arranged to ensure that associations between instructions and data are enforced so that a...
US-8,745,622 Standalone software performance optimizer system for hybrid systems
Standalone software performance optimizer systems for hybrid systems include a hybrid system having a plurality of processors, memory operably connected to the...
US-8,738,885 Method of selection of an available memory size of a circuit including at least processor and a memory and...
The invention relates to a method for selecting an available memory size of a circuit including at least a CPU and a total memory, the method includes a stage...
US-8,738,034 Method and system for global navigation satellite system configuration of wireless communication applications
Methods and systems for global navigation satellite system configuration of wireless communication applications may comprise determining a location of a...
US-8,734,333 Endoscope system, endoscope video processor and method of driving endoscope system
A light source device emits normal illumination light and special illumination light interchangeably at a charge-storage time of an imaging device. A DRP is...
US-8,731,694 Portable device with freefall detection or audio processing subsystem and freefall detection or audio...
In a class of embodiments, a method and apparatus for detecting freefall of a disk device (thereby predicting that the disk device will likely suffer imminent...
US-8,731,281 Wavelet transform on incomplete image data and its applications in image processing
A system and method for effectively performing wavelet transforms on incomplete image data includes an image processor that performs a green-pixel...
US-8,730,248 Multi-graphics processor system, graphics processor and data transfer method
A multi-graphics processor system includes a CPU; a first GPU connected to the CPU via an input/output interface; and a second GPU connected to the first GPU...
US-8,730,230 Continuous graphics display method for multiple display devices during the processor non-responding period
The present invention provides an image/graphics data display mechanism for continuously displaying image/graphics data on multiple display devices of a...
US-8,725,958 Methods and systems for maintaining cache coherency in multi-processor systems
The present invention provides a data processor capable of reducing power consumption at the time of execution of a spin wait loop for a spinlock. A CPU...
US-8,725,922 Data processor and control system
Provided are a data processor, and a control system, in which an interrupt controller and an event link controller are adopted. The event link controller...
US-8,719,839 Two way communication support for heterogenous processors of a computer platform
A computer system may comprise a computer platform and input-output devices. The computer platform may include a plurality of heterogeneous processors...
US-8,719,542 Data transfer apparatus, data transfer method and processor
A processor includes a CPU core which executes a user program, and a data transfer apparatus. The CPU core stores a transfer request from a user program in a...
US-8,713,563 Data processor with virtual machine management
A data processor includes: a central processing unit (CPU), in which a plurality of virtual machines (101), each running an application program under controls...
US-8,710,863 Configurable logic cells
A processor includes a RISC CPU core; and a plurality of peripherals including one or more configurable logic cell peripherals. The configurable logic cell...
US-8,706,996 Data processor
The data processor can form a system including a combination of two or more operating systems running in parallel, which achieves a higher data transfer rate...
US-8,705,866 Region description and modeling for image subscene recognition
A method and apparatus is described here that categorizes images by extracting regions and describing the regions with a 16-dimensional subscene feature vector,...
US-8,701,119 Parsing XML in software on CPU with multiple execution units
An improved method for parsing XML data or NVP data in software is disclosed. The method takes advantage of some modern processors' architecture which has...
US-8,698,817 Video processor having scalar and vector components
A video processor for executing video processing operations. The video processor includes a host interface for implementing communication between the video...
US-8,688,964 Programmable exception processing latency
A digital processor with programmable exception processing latency, may have a central processing unit (CPU) of a digital processor, an exception controller...
US-8,687,008 Latency tolerant system for executing video processing operations
A latency tolerant system for executing video processing operations. The system includes a host interface for implementing communication between the video...
US-8,683,474 Accounting apparatus and method for SMT processor
In an accounting apparatus, a conflict determination unit determines whether or not the accounting mode is in a conflict state where a process is executing in...
US-8,683,132 Memory controller for sequentially prefetching data for a processor of a computer system
A memory controller for prefetching data for a processor, or CPU, of a computer system. The memory controller functions by interfacing the processor to system...
US-8,682,337 Computing system with off-load processing for networking related tasks
A method is described that comprises executing a service selection method on an off load processor of a computing system to select an available network service...
US-8,677,034 System for controlling I/O devices in a multi-partition computer system
An I/O control system for controlling I/O devices in a multi-partition computer system. The I/O control system includes an IOP partition containing an I/O...
US-8,677,010 System and method for TCP offload
Aspects of the invention may comprise receiving an incoming TCP packet at a TEEC and processing at least a portion of the incoming packet once by the TEEC...
US-8,667,313 Apparatus and method for reducing power consumption in system on chip
An apparatus and method for reducing power consumption in a System on Chip (SoC) are provided. The SoC includes a clock unit for providing clocks to all...
US-8,667,049 Massively parallel supercomputer
A novel massively parallel supercomputer of hundreds of teraOPS-scale includes node architectures based upon System-On-a-Chip technology, i.e., each processing...
US-8,654,884 Channel equalization using application specific digital signal processing in high-speed digital transmission...
A method and circuit for performing channel equalization in a high speed transmission system comprising a transmitter and receiver. An application specific...
US-8,648,867 Graphic processor based accelerator system and method
An accelerator system is implemented on an expansion card comprising a printed circuit board having (a) one or more graphics processing units (GPU), (b) two or...
US-8,644,174 Network based virtualization performance
The disclosed embodiments support improvements in network performance in networks such as storage area networks. This is particularly important in networks such...
US-8,640,194 Information communication device and program execution environment control method
A device and a method are provided for increasing processing speed and for ensuring system security when an application or a driver is added. The device...
US-8,640,131 Demand-based processor cycle allocation subsequent to equal group-based processor cycle distribution
Embodiments that facilitate the fair and dynamic distribution of central processing unit (CPU) time are disclosed. In accordance with one embodiment, a method...
US-8,635,263 Node processing device and its processing method
When the multiple sensors monitored by a sensor management unit, input sensor information into the entrance node, a sensor type identifier unit utilizes a...
US-8,634,476 High definition camera
A camera includes a high definition (HD) imager with a central processing unit (CPU) or a graphic processing unit (GPU) including a plurality of processors...
US-8,631,140 Intelligent network interface system and method for accelerated protocol processing
A system for protocol processing in a computer network has an intelligent network interface card (INIC) or communication processing device (CPD) associated with...
US-8,626,972 I2C multi-slot circuit system and method for transmitting I2C signals
An I2C multi-slot circuit system includes a plurality of I2C slots for receiving a plurality of slave processors, a CPU, a logic control unit, and a I2C switch...
US-8,621,335 Optimized Viterbi decoder and GNSS receiver
A Viterbi decoder which is based on a special instruction set implemented in the processor, enabling it to handle the Viterbi processing with a much lower CPU...
US-8,621,273 Enhanced scalable CPU for coded execution of SW in high-dependable safety relevant applications
Some embodiments of the invention relate to a single processor configured to comprise configurable hardware extensions, disposed within a data path configured...
US-8,621,127 Multi-processor device with groups of processors and respective separate external bus interfaces
The present invention intends to provide a high-performance multi-processor device in which independent buses and external bus interfaces are provided for each...
US-8,619,310 Image forming apparatus
A CPU perform the steps of: (a) causing a compression/decompression processor to decompress the compressed data of one of three bands in the data area except...
US-8,619,077 Efficient execution of color space processing functions in a graphics processing unit
A pixel shader program for execution by a processing unit in a graphics processing module is designed to execute a color space processing function on individual...
US-8,615,667 Processor and processor system
In a processor including a CPU core executing instruction codes and a cache memory part having plural ways, encryption counter data encrypting and decrypting...
US-8,612,792 Power measurement device
A device to measure power consumption includes a processor connected to a central processing unit (CPU) and a memory module, a switch for setting the power...
US-8,612,732 Retargetting an application program for execution by a general purpose processor
One embodiment of the present invention sets forth a technique for translating application programs written using a parallel programming model for execution on...
US-8,610,727 Dynamic processing core selection for pre- and post-processing of multimedia workloads
Apparatus having corresponding methods comprise a processing core performance monitoring module adapted to receive indications of performance levels of a...
US-8,607,086 Massively multicore processor and operating system to manage strands in hardware
A computing apparatus and corresponding method for operating are disclosed. The computing apparatus may comprise a set of interconnected central processing...
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