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Searching: cpu processor





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Patent # Description
US-8,495,418 Achieving ultra-high availability using a single CPU
Techniques for achieving high-availability using a single processor (CPU). In a system comprising a multi-core processor, at least two partitions may be...
US-8,495,241 Communication apparatus and method therefor
Provided are a communication apparatus and a method therefor that are capable of executing a checksum attachment processing without increase of a circuit scale....
US-8,490,085 Methods and systems for CPU virtualization by maintaining a plurality of virtual privilege leves in a...
A method for running, on a processor in non-privileged mode, different computer programs P while, in a nominal mode, using privileged instructions including...
US-8,489,927 Device for use in inspecting a CPU and method thereof
A device for use in inspecting a CPU and a method thereof are provided. The device comprises a receiving interface and a processor. The receiving interface...
US-8,489,861 Split embedded DRAM processor
A processing architecture includes a first CPU core portion coupled to a second embedded dynamic random access memory (DRAM) portion. These architectural...
US-8,489,788 Data processor and control system
Provided are a data processor, and a control system, in which an interrupt controller and an event link controller are adopted. The event link controller...
US-8,484,647 Selectively adjusting CPU wait mode based on estimation of remaining work before task completion on GPU
A technique for processing instructions in an electronic system is provided. In one embodiment, a processor of the electronic system may submit a unit of work...
US-8,484,453 Data processing system having an operating system adapter and method
A data processing system includes a central processing unit (CPU) and a memory coupled to the CPU. The memory includes an operating system (OS) adapter...
US-8,479,025 Motherboard
A motherboard includes a power circuit, a system power supply, and a central processor unit (CPU). The power circuit includes a direct current (DC) voltage...
US-8,474,021 Security system and method for computers
A computer security device comprising a processor that is independent of the host CPU for controlling access between the host CPU and the storage device. A...
US-8,468,532 Adjusting CPU time allocated to next thread based on gathered data in heterogeneous processor system having...
A method that optimizes system performance using performance monitors is presented. The method gathers thread performance data using performance monitors for...
US-8,467,751 Serial interface communication test apparatus and test method using the same
A test apparatus for testing quality of serial interface communication between two CPUs of a dual-mode handset includes a processor module and a switch module....
US-8,464,026 Method and apparatus for computing massive spatio-temporal correlations using a hybrid CPU-GPU approach
A CPU may select a variable from a variable set as a dependent variable. The variable set may be part of the data structure that includes a plurality of vector...
US-8,463,578 Hardware based utilization metering
A hardware based utilization metering device, and a corresponding method are used in a computer system having one or more central processor units (CPUs) to...
US-8,461,958 System for monitoring and control of transport containers
The invention comprises a unit and system for remote monitoring and controlling of various conditions in a container during cargo. The system includes a local...
US-8,458,791 Hardware-implemented hypervisor for root-of-trust monitoring and control of computer system
A system and method for modifying a processor system with hypervisor hardware to provide protection against malware. The processor system is assumed to be of a...
US-8,448,000 Methods and apparatuses for operating a data processing system
Methods and apparatuses to manage working states of a data processing system. At least one embodiment of the present invention includes a data processing system...
US-8,447,961 Mechanism for efficient implementation of software pipelined loops in VLIW processors
A system to implement a zero overhead software pipelined (SFP) loop includes a Very Long Instruction Word (VLIW) processor having an N number of execution...
US-8,447,803 Method and apparatus for distributing network traffic processing on a multiprocessor computer
An intelligent network interface card (INIC) or communication processing device (CPD) works with a host computer for data communication. The device provides a...
US-8,437,325 Wireless communication terminal, air interface apparatus and method for participating in wireless network
A game device is provided with a processor and an air interface apparatus. In a wireless communication environment such as that of IEEE802.11, a CPU of the air...
US-8,432,809 Method for communication between processors
The invention provides a method and system for communication between processors. Rather than provide an external network connection solely for providing a...
US-8,429,669 Virtual machine switching control by prefetching information out of and updating a set of processor control...
Provided is a virtual machine including a first virtualization module operating on a physical CPU, for providing a first CPU, and a second virtualization module...
US-8,423,661 Packet communication device, packet communication system, packet communication module, data processor, and data...
A transmit packet generated by a CPU 1 is held in a buffer 100a (100b). From among packets received from Ethernet 820a (820b), a packet, a destination of which...
US-8,423,463 Personal financial manager with gift cards aggregation
A method for managing the use of a gift card with a personal financial management application (PFMA), including storing a balance of the gift card in the PFMA,...
US-8,422,830 Image processing system with an address snooping apparatus
An image processing system includes a first image processor that reads out a first image written in a main memory to apply a first process to the first image...
US-8,417,858 System and method for enabling multiple processors to share multiple SAS wide ports
Embodiments of the present invention provide for an IOC that does not limit each CPU to a particular port. Instead, the IOC may allow each CPU to communicate...
US-8,407,679 Source code processing method, system and program
A method, system, and computer readable article of manufacture to enable parallel execution of a divided source code in a multiprocessor system. The method...
US-8,402,294 Mechanism for adaptively adjusting a direct current loadline in a multi-core processor
A central processing unit (CPU) is disclosed. The CPU includes two or more processing cores and a power control unit to regulate voltage applied to the CPU...
US-8,402,260 Data processing apparatus having address conversion circuit
The present invention provides a data processing apparatus realizing reduced load on a host CPU and improved performance. An arithmetic unit includes an SIMD...
US-8,392,667 Deadlock avoidance by marking CPU traffic as special
Deadlocks are avoided by marking read requests issued by a parallel processor to system memory as "special." Read completions associated with read requests...
US-8,380,993 Method and system for robust watermark insertion and extraction for digital set-top boxes
Methods and systems for robust watermark insertion and extraction for digital set-top boxes are disclosed and may include descrambling, detecting watermarking...
US-8,379,061 Packet-based digital display system
An all-digital display system includes an electronic processor that is operable to receive an internet protocol video packet and to generate a control signal...
US-8,374,842 Device emulation support apparatus, device emulation support method, device emulation support circuit and...
An access monitoring section (11) obtains access information including an address conforming to an address stored in a monitoring address setting section (10)...
US-8,370,556 Multi-core data processor
A multi-core LSI with improved stability of operation. The multi-core LSI includes a plurality of CPUs coupled to a first shared bus, one or more modules...
US-8,365,187 Analysis of short term CPU spikes in an operating system kernel
A profiler may analyze processes being run by a processor. The profiler may include logic to periodically sample a value of an instruction pointer that...
US-8,364,998 Adaptive real-time methodology for optimizing energy-efficient computing
Dynamic voltage and frequency scaling (DVFS) is an effective way to reduce energy and power consumption in microprocessor units. Current implementations of DVFS...
US-8,364,997 Virtual-CPU based frequency and voltage scaling
Frequency and voltage scaling are performed for each virtual processor in a virtual environment. The characteristics of the workload performed by each virtual...
US-8,364,857 Wireless modem with CPU and auxiliary processor that shifts control between processors when in low power state...
A computing device includes a low power auxiliary processor, such as a processor on a wireless card or sub-system, which is able to takeover processing in place...
US-8,359,462 Method and apparatus for programmable coupling between CPU and co-processor
In one embodiment the present invention includes a method and apparatus for enabling a main core and one or more co-processors to operate in a de-coupled mode,...
US-8,359,185 Reservoir simulation of giant subsurface reservoirs with accelerated phase equilibrium determination
A computer system analyzes data from giant subsurface hydrocarbon reservoirs which are organized into a number of component cells and simulates the conditions...
US-8,352,946 Managing migration ready queue associated with each processor based on the migration ready status of the tasks
The present disclosure is directed to a method for managing tasks in a computer system having a plurality of CPUs. Each task in the computer system may be...
US-8,347,290 Monitoring spin locks in virtual machines in a computing system environment
Methods and apparatus involve monitoring spin locks for guest devices. Fully virtualized guests have multiple virtual processors configured under the scheduling...
US-8,341,641 Task processor
A task processor includes a CPU, a save circuit, and a task control circuit. A task control circuit is provided with a task selection circuit and state storage...
US-8,339,869 Semiconductor device and data processor
To improve the speed of accessing a low-speed circuit block from a high-speed circuit block without significantly increasing power consumption. In a data...
US-8,336,031 Method and system of performing thread scheduling
A method and system of performing thread scheduling. At least some of the illustrative embodiments are computer-readable mediums storing a program that, when...
US-8,332,302 Method and apparatus for auctioning items
An electronic auction system which Includes a Central Auction Controller (CAC) that allows sellers to list items for auction and users to enter bids and rank...
US-8,327,446 Antivirus stand-alone network or internet appliance and methods therefor
The invention provides an antivirus network or Internet appliance and methods therefor. A preferred embodiment of the Internet appliance according to the...
US-8,327,379 Method for switching a selected task to be executed according with an output from task selecting circuit
A task processor includes a CPU, a save circuit, and a task control circuit. The CPU is provided with a processing register and an execution control circuit...
US-8,327,117 Reconfigurable FADEC with flash based FPGA control channel and ASIC sensor signal processor for aircraft engine...
A reconfigurable FADEC includes a reconfigurable CPU configured for performing digital computing functions. A reconfigurable MSPD communicates with the CPU and...
US-8,321,693 Parallel processing method and system, for instance for supporting embedded cluster platforms, computer program...
A multi-processing system-on-chip including a cluster of processors having respective CPUs is operated by: defining a master CPU within the respective CPUs to...
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