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Searching: cpu processor





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Patent # Description
US-8,234,482 Universal embedded controller for freeing CPU from operations of peripheral subsystem units with table of...
A subprocessor is used to interface between subsystems and to reduce the amount of dedicated hardware used to implement the subsystems in a hand-held computer....
US-8,232,874 Vehicle child seat safety system
A vehicle child seat safety system comprises a child seat sensor connected to a transmitter, a receiver in the vehicle connected to a processor controlling...
US-8,230,434 Entitlement management system, method and program product for resource allocation among micro-partitions
An entitlement management system for distributing spare CPU processor resources to a plurality of deployment groups operating in a data processing system, the...
US-8,230,198 System for synchronous code retrieval from an asynchronous source
The present invention discloses a computer-readable storage medium having computer-readable code embodied on the computer-readable storage medium, the...
US-8,228,376 Image taking apparatus
The image taking apparatus includes: a CCD which takes an image of a subject to obtain a shot image; a processor-side CPU which has three or more photometric...
US-8,224,969 Information processor
In an information processor connected with an external apparatus by wireless to transmit and receive data, a connection with a plurality of external apparatuses...
US-8,223,040 Mobile terminal and method for operating touch keypad thereof
A mobile terminal and method for operating a touch keypad, the mobile terminal including a touch keypad, a touch sensor processor for sensing a signal inputted...
US-8,219,731 Data processor and control system
Provided are a data processor, and a control system, in which an interrupt controller and an event link controller are adopted. The event link controller...
US-8,218,555 Gigabit ethernet adapter
A gigabit Ethernet adapter provides a provides a low-cost, low-power, easily manufacturable, small form-factor network access module which has a low memory...
US-8,212,842 Display processing device
A display processor increases graphics display performance. The display processor includes: an OSD plane having a first OSD area and a second OSD area for...
US-8,205,020 High-performance digital image memory allocation and control system
Systems and methods are described that facilitate mitigating processor overload and reducing memory waste during image compression. Clients requesting memory...
US-8,202,167 System and method of interactive video playback
A method of providing an interactive game through playback of video, the method comprising the steps of providing a video player with a processor, the processor...
US-8,201,004 Entry/exit control to/from a low power state in a complex multi level memory system
An embedded megamodule and an embedded CPU enable power-saving through a combination of hardware and software. The CPU configures the power-down controller...
US-8,200,934 Data transfer unit in multi-core processor
To reduce overhead of data transfer between processor cores and improve a processing capability of a processor, there is provided a processor including: a CPU...
US-8,200,878 Multi-processor device with groups of processors consisting of respective separate external bus interfaces
The present invention intends to provide a high-performance multi-processor device in which independent buses and external bus interfaces are provided for each...
US-8,191,062 System for processor frequency governors to govern a processor frequency by deriving CPU utilization...
A method, apparatus and system enable processor frequency governors to comprehend virtualized platforms. Specifically, in one embodiment, the processor...
US-8,190,825 Arithmetic processing apparatus and method of controlling the same
A common L2 cache unit of a CPU constituting a multicore processor, in addition to a PFPORT arranged for each CPU core unit, has a common PFPORT shared by the...
US-8,189,935 Data processing device, image encoding/decoding device and data processing system
To reduce a processing load of an external CPU, when a large amount of data is initially set frequently to an image coding/decoding device. The image...
US-8,185,882 Java virtual machine hardware for RISC and CISC processors
A hardware Java accelerator is provided to implement portions of the Java virtual machine in hardware in order to accelerate the operation of the system on Java...
US-8,181,064 Information processing apparatus for inhibiting instructions, saving and restoring internal information in...
A northbridge, when detecting a synchronization break of a redundant CPU, stops the operation of an abnormal CPU bus where an error has occurred and the...
US-8,180,177 Seam-based reduction and expansion of images using parallel processing of retargeting matrix strips
Systems, methods, and computer-readable storage media for resizing images using seam carving techniques may access a pre-computed retargeting matrix for an...
US-8,180,165 Accelerated screen codec
An accelerated screen codec technique is described that provides a general screen compression framework, which, in one embodiment, is Graphics Processor Unit...
US-8,171,281 Microprocessor boot-up controller connected to a processor and NAND flash memory for controlling the boot-up of...
An information processing apparatus has a multi-valued NAND nonvolatile memory including a plurality of word lines and a plurality of memory cells connected to...
US-8,170,205 Processor apparatus
The control unit includes a CPU which generates an access signal for performing writing or reading on the external memory, encryption/decryption means which,...
US-8,165,864 Method, system and computer program product for verifying address generation, interlocks and bypasses
Method, system and computer program product for verifying the address generation, address generation interlocks, and address generation bypassing controls in a...
US-8,145,926 Fan speed control of silicon based devices in low power mode to reduce platform power
In general, in one aspect, the disclosure describes running a cooling fan within a computer at low speed while the computer is in low temperature operations...
US-8,141,079 Dynamic application scheduler in a polling system
A dynamic scheduling system is provided that comprises a processor, a polling task, a work task, and a scheduler assistant task. The polling task is configured...
US-8,140,872 Restoring processor context in response to processor power-up
A CPU (1) automatically preserves the CPU context in a computer memory (5) that remains powered-up when the CPU is powered down in sleep mode. By means of the...
US-8,140,797 Integrated circuit and method of securing access to an on-chip memory
An integrated circuit having an on-chip access right manager to grant or deny access to a memory segment to a peripheral device such as a CPU (Central...
US-8,137,127 Electronic devices using divided multi-connector element differential bus connector
In one example an electronic device includes a housing that includes an A/C input or DC input, and at least one circuit substrate that includes electronic...
US-8,136,153 Securing CPU affinity in multiprocessor architectures
In an embodiment of the present invention, the ability for a user or process to set or modify affinities is restricted in order to method for control a...
US-8,131,880 Intelligent network interface device and system for accelerated communication
An intelligent network interface card (INIC) or communication processing device (CPD) works with a host computer for data communication. The device provides a...
US-8,117,614 Extract CPU time facility
An efficient facility for determining resource usage, such as a processor time used by tasks. The determination is performed on behalf of user applications that...
US-8,117,427 Motherboard, storage device and controller thereof, and booting method
A motherboard, a storage device and a controller thereof and a booting method are provided. In the present invention, when powered on, an unfetch signal is...
US-8,116,540 Apparatus and method for reducing noise in fingerprint sensing circuits
An apparatus for reducing noise in fingerprint sensing circuits is disclosed in one embodiment of the invention as including a fingerprint sensing area onto...
US-8,112,648 Enhanced control of CPU parking and thread rescheduling for maximizing the benefits of low-power state
A system may comprise a plurality of processing units and a scheduler configured to maintain a record for each respective processing unit. Each respective...
US-8,108,877 Affinity dispatching load balancer with precise CPU consumption data
A system for distributing a plurality of tasks over a plurality of nodes in a network includes: a plurality of processors for executing tasks; a plurality of...
US-8,108,875 Affinity dispatching load balancer with precise CPU consumption data
A computer-implemented method for distributing a plurality of tasks over a plurality of processing nodes in a processor network includes the following steps:...
US-8,108,633 Shared stream memory on multiple processors
A method and an apparatus that allocate a stream memory and/or a local memory for a variable in an executable loaded from a host processor to the compute...
US-8,108,586 Multi-core data processor
To provide a multi-core LSI capable of improving the stability of operation. A multi-core LSI comprises a plurality of CPUs coupled to a first shared bus, one...
US-8,108,196 System for yielding to a processor
An apparatus and program product for coordinating the distribution of CPUs as among logically-partitioned virtual processors. A virtual processor may yield a...
US-8,090,674 Integrated system and method for multichannel neuronal recording with spike/LFP separation, integrated A/D...
A CMOS integrated circuit for multi-channel neuronal recording with twelve true-differential channels, band separation and digital offset calibration. The...
US-8,087,905 Cooling apparatus for an electronic device to be cooled
The invention relates to a cooling apparatus for an electric component such as a CPU, a memory or power semiconductor, such as transistors or LEDs, or a...
US-8,078,858 Manufacturing boot process with minimal component initialization
A test mode initialization system includes beginning a power-on self-test (POST) wherein the POST may be performed to determine whether a system under test is...
US-8,074,005 Data processor and control system
Provided are a data processor, and a control system, in which an interrupt controller and an event link controller are adopted. The event link controller...
US-8,069,444 Method and apparatus for achieving fair cache sharing on multi-threaded chip multiprocessors
In a computer system with a multi-core processor having a shared cache memory level, an operating system scheduler adjusts the CPU latency of a thread running...
US-8,069,344 System and method for analyzing CPU performance from a serial link front side bus
Monitoring of boot progress for a multiprocessor information handling system is performed with a test module running on a CPLD. RAM integrated in the CPLD...
US-8,065,501 Indexing a translation lookaside buffer (TLB)
A processor is to comprise a central processing unit (CPU), an address generation unit (AGU), an index generation unit and a translation look-aside buffer...
US-8,065,026 Vehicle computer system with audio entertainment system
A vehicle computer system has an audio entertainment system implemented in a logic unit and audio digital signal processor (DSP) independent from the host CPU....
US-8,055,927 Structure for analyzing dynamic CPU voltage
A design structure embodied in a machine readable storage medium for designing, manufacturing, and/or testing a system is disclosed for monitoring a voltage...
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