| United States Patent | 5,835,761 |
| Ishii , et al. | November 10, 1998 |
There is provided with an information processing system capable of updating a basic input/output system (BIOS) programme without interrupting or stopping the operation of the system. The information processing system (41) comprises an update programme memory (48) and a BIOS update flag (50). The update programme memory (48) retains the contents stored therein after the electrical power to the information processing system (41) has been turned off. An update programme input arrangement supplies an update basic input/output system programme to the update programme memory (48) to write the programme thereinto while the operating system is in operation. The update programme input arrangement then sets the BIOS update flag (50). A system loading arrangement copies the update basic input/output system programme stored in the update programme memory (48) to a memory area of a main memory (44) when the BIOS update flag (50) is set upon loading the operating system (i.e., when the information processing system is turned on or is reset).
| Inventors: | Ishii; Masahiro (Kamakura, JP), Yokoi; Toshikazu (Kamakura, JP), Takahari; Kunio (Kamakura, JP), Toshima; Atsushi (Kamakura, JP), Hough; Colin (Birmingham, GB), Bruce; Nigel (Birmingham, GB) |
| Assignee: |
Mitsubishi Denki Kabushiki Kaisha
(Tokyo,
JP)
Apricot Computers Limited (Birmingham, GB) |
| Appl. No.: | 08/895,529 |
| Filed: | July 17, 1997 |
| Application Number | Filing Date | Patent Number | Issue Date | ||
| 363690 | Dec., 1994 | ||||
| Jun 29, 1994 [GB] | 9413088 | |||
| Current U.S. Class: | 713/100 ; 713/2; 714/E11.133 |
| Current International Class: | G06F 11/14 (20060101); G06F 9/445 (20060101); G06F 009/45 () |
| Field of Search: | 395/651,652,653 |
| 5101490 | March 1992 | Getson, Jr. et al. |
| 5113497 | May 1992 | Dewa |
| 5230052 | July 1993 | Dayan et al. |
| 5355489 | October 1994 | Bealkowski et al. |
| 5388267 | February 1995 | Chan et al. |
| 5410699 | April 1995 | Bealkowski et al. |
| 0476195 | Mar., 1992 | EP | |||
| 0479427 | Apr., 1992 | EP | |||
| 92-383304 | Nov., 1992 | EP | |||
| 0524719 | Jan., 1993 | EP | |||
| 4026911 | Feb., 1991 | DE | |||
| 4214184 | Nov., 1992 | DE | |||
| 3-156524 | Jul., 1991 | JP | |||
| 5-216639 | Aug., 1993 | JP | |||
Dipert et al., "Designing an updatable BIOS using flash memory," Microprocessors and Microsystems, vol. 16, No. 8, pp. 427-446, 1992. . Jex, Jerry, "Flash Memory BIOS for PC and Notebook Computers," IEEE Pacific Rim Conference on Communications, Computers, and Signal Processing, vol. 2 of 2, pp. 692-695, May 10, 1991. . IBM Technical Disclosure Bulletin "Halt/Reset Option in Non-Maskable Interrupt Handler", Sep. 1991. . IBM Technical Disclosure Bulletin "Update Mechanism For Personal Computer System Resident Firmware" Mar. 1992. . B. Dipert & D. Verner "Designing an updatable BIOS using Flash Memory" Microprocessors & Microsystems, Oct. 1992. . J. Shandle "Laptop Vendodrs Join the Flash Bandwagon" Electronics Nov., 1990.. |