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United States Patent
November 28, 2000
The ornamental design for an IC card, as shown.
Iwasaki; Hiroshi (Yokohama, JP) Assignee:
Kabushiki Kaisha Toshiba
July 12, 1999
Foreign Application Priority Data
Jan 22, 1999
Current U.S. Class: D14/436
Current International Class:
Field of Search:
D14/114,117 D13/182 235/382.5,375,487-94,441-3 361/736-7,752 174/52.1 283/75-77,48.1,107,901 D19/9-10
U.S. Patent Documents
Other References Toshiba, pp. 1-32, "Toshiba MOS Digital Integrated Circuit Silicon Gate CMOS 128Mbit (16M.times.8bit) CMOS NAND E.sup.2 PROM (16M Byte
SmartMedia.TM.)", Nov. 6, 1998.
. Toshiba, pp. 1-32, "Toshiba MOS Digital Integrated Circuit Silicon Gate CMOS 64Mbit (8M.times.8bit) CMOS NAND E.sup.2 PROM (8M Byte SmartMedia.TM.)", Nov. 6, 1998.. Primary Examiner:
Tung; M. H.
Attorney, Agent or Firm: Oblon, Spivak, McClelland, Maier & Neustadt, P.C.
FIG. 1 is a front, bottom and right side perspective view of an IC card,
showing my new design;
FIG. 2 is a top plan view thereof;
FIG. 3 is a right side elevational view thereof;
FIG. 4 is a front elevational view thereof;
FIG. 5 is a bottom plan view thereof;
FIG. 6 is a left side elevational view thereof; and,
FIG. 7 is a rear elevational view thereof.
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